Electrical Specifications
Table 22-13. MMIIC Interface Input/Output Signal Timing
Characteristic
Symbol
Min
Typ
Max
Unit
Comments
fSMB
Operating frequency
10
—
100
kHz MMIIC operating frequency
Bus free time between STOP and
START condition
tBUF
Bus free time
4.7
4.0
—
—
—
—
µs
Hold time after (repeated) START
condition. After this period, the first
clock is generated.
tHD.STA
Repeated start hold time.
µs
tSU.STA
tSU.STO
tHD.DAT
tSU.DAT
tTIMEOUT
tLOW
Repeated start setup time.
Stop setup time
Hold time
4.7
4.0
300
250
25
—
—
—
—
—
—
—
—
—
—
—
35
—
—
µs
µs
ns
ns
ms
µs
µs
Repeated START condition setup time.
Stop condition setup time.
Data hold time.
Setup time
Data setup time.
Clock low time-out.(1)
Clock low period
Clock low time-out
Clock low
4.7
4.0
Clock high period.(2)
tHIGH
Clock high
Cumulative clock low extend time (slave
device)(3)
tLOW.SEXT
Slave clock low extend time
Master clock low extend time
—
—
—
—
25
10
ms
ms
Cumulative clock low extend time
(master device) (4)
tLOW.MEXT
Clock/Data Fall Time(5)
Clock/Data Rise Time(5)
tF
Fall time
—
—
—
—
300
ns
ns
tR
Rise time
1000
1. Devices participating in a transfer will timeout when any clock low exceeds the value of TTIMEOUT min. of 25ms. Devices
that have detected a timeout condition must reset the communication no later than TTIMEOUT max of 35ms. The maximum
value specified must be adhered to by both a master and a slave as it incorporates the cumulative limit for both a master
(10 ms) and a slave (25 ms).
Software should turn-off the MMIIC module to release the SDA and SCL lines.
2. THIGH MAX provides a simple guaranteed method for devices to detect the idle conditions.
3. TLOW.SEXT is the cumulative time a slave device is allowed to extend the clock cycles in one message from the initial start
to the stop. If a slave device exceeds this time, it is expected to release both its clock and data lines and reset itself.
4. TLOW.MEXT is the cumulative time a master device is allowed to extend its clock cycles within each byte of a message as
defined from start-to-ack, ack-to-ack, or ack-to-stop.
5. Rise and fall time is defined as follows: TR = (VILMAX – 0.15) to (VIHMIN + 0.15), TF = 0.9×VDD to (VILMAX – 0.15).
MC68HC908AP Family Data Sheet, Rev. 4
308
Freescale Semiconductor
FREESCALE [ Freescale ]
