Analog-to-Digital Converter (ADC)
Read:
AD9
R
AD8
R
AD7
R
AD6
R
AD5
R
AD4
R
AD3
R
AD2
R
ADC Data Register Low 2
(ADRL3)
$005C
$005D
$005E
Write:
Reset:
Read:
Write:
Reset:
Read:
0
0
0
0
0
0
0
0
AD9
R
AD8
R
AD7
R
AD6
R
AD5
R
AD4
R
AD3
R
AD2
R
ADC Data Register Low 3
(ADRL3)
0
0
0
0
0
0
0
0
0
0
0
0
0
ADC Auto-scan Control
AUTO1
AUTO0
0
ASCAN
0
Register Write:
(ADASCR)
Reset:
0
0
0
0
0
0
= Unimplemented
= Reserved
R
Figure 15-1. ADC I/O Register Summary
15.3 Functional Description
The ADC provides eight pins for sampling external sources at pins PTA0/ADC0–PTA7/ADC7. An analog
multiplexer allows the single ADC converter to select one of eight ADC channels as ADC voltage in
(V
). V
is converted by the successive approximation register-based analog-to-digital converter.
ADIN
ADIN
When the conversion is completed, ADC places the result in the ADC data register, high and low byte
(ADRH0 and ADRL0), and sets a flag or generates an interrupt.
An additional three ADC data registers (ADRL1–ADRL3) are available to store the individual converted
data for ADC channels ADC1–ADC3 when the auto-scan mode is enabled. Data from channel ADC0 is
stored in ADRL0 in the auto-scan mode.
Figure 15-2 shows the structure of the ADC module.
15.3.1 ADC Port I/O Pins
PTA0–PTA7 are general-purpose I/O pins that are shared with the ADC channels. The channel select
bits, ADCH[4:0], define which ADC channel/port pin will be used as the input signal. The ADC overrides
the port I/O logic by forcing that pin as input to the ADC. The remaining ADC channels/port pins are
controlled by the port I/O logic and can be used as general-purpose I/O. Writes to the port data register
or data direction register will not have any affect on the port pin that is selected by the ADC. Read of a
port pin which is in use by the ADC will return the pin condition if the corresponding DDR bit is at logic 0.
If the DDR bit is at logic 1, the value in the port data latch is read.
15.3.2 Voltage Conversion
When the input voltage to the ADC equals V
, the ADC converts the signal to $3FF (full scale). If the
REFH
input voltage equals V
, the ADC converts it to $000. Input voltages between V
and V
are a
REFL
REFH
REFL
straight-line linear conversion. All other input voltages will result in $3FF if greater than V
and $000
REFH
if less than V
.
REFL
NOTE
Input voltage should not exceed the analog supply voltages.
MC68HC908AP Family Data Sheet, Rev. 4
248
Freescale Semiconductor
FREESCALE [ Freescale ]
