Chapter 15
Analog-to-Digital Converter (ADC)
15.1 Introduction
This section describes the analog-to-digital converter (ADC). The ADC is a 8-channel 10-bit linear
successive approximation ADC.
15.2 Features
Features of the ADC module include:
•
•
•
•
•
•
•
•
•
Eight channels with multiplexed input
High impedance buffered input
Linear successive approximation with monotonicity
10-bit resolution
Single or continuous conversion
Auto-scan conversion on four channels
Conversion complete flag or conversion complete interrupt
Selectable ADC clock
Conversion result justification
–
–
–
–
8-bit truncated mode
Right justified mode
Left justified mode
Left justified sign mode
Addr.
Register Name
Bit 7
Read: COCO
6
AIEN
0
5
4
3
2
1
Bit 0
ADC Status and Control
Register Write:
(ADSCR)
ADCO
0
ADCH4
1
ADCH3
1
ADCH2
1
ADCH1
ADCH0
$0057
Reset:
Read:
0
1
0
1
0
ADC Clock Control
ADIV2
ADIV1
ADIV0
ADICLK
MODE1
MODE0
$0058
$0059
$005A
$005B
Register Write:
R
(ADICLK)
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
0
ADx
R
0
ADx
R
0
ADx
R
0
ADx
R
0
ADx
R
1
ADx
R
0
ADx
R
0
ADx
R
ADC Data Register High 0
(ADRH0)
0
0
0
0
0
0
0
0
ADx
R
ADx
R
ADx
R
ADx
R
ADx
R
ADx
R
ADx
R
ADx
R
ADC Data Register Low 0
(ADRL0)
0
0
0
0
0
0
0
0
AD9
R
AD8
R
AD7
R
AD6
R
AD5
R
AD4
R
AD3
R
AD2
R
ADC Data Register Low 1
(ADRL1)
0
0
0
0
0
0
0
0
Figure 15-1. ADC I/O Register Summary
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
247
FREESCALE [ Freescale ]
