I/O Registers
Table 12-7. SCI Baud Rate Prescaling
SCP1 and SCP0
Prescaler Divisor (PD)
00
01
10
11
1
3
4
13
SCR2–SCR0 — SCI Baud Rate Select Bits
These read/write bits select the SCI baud rate divisor as shown in Table 12-8. Reset clears
SCR2–SCR0.
Table 12-8. IRSCI Baud Rate Selection
SCR2, SCR1, and SCR0
Baud Rate Divisor (BD)
000
001
010
011
100
101
110
111
1
2
4
8
16
32
64
128
Use this formula to calculate the SCI baud rate:
SCI clock source
baud rate = --------------------------------------------
16 × PD × BD
where:
SCI clock source = f
or CGMXCLK
BUS
(selected by CKS bit)
PD = prescaler divisor
BD = baud rate divisor
Table 12-9 shows the SCI baud rates that can be generated with a 4.9152-MHz bus clock when f
selected as SCI clock source.
is
BUS
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
207
FREESCALE [ Freescale ]
