Freescale Semiconductor, Inc.
Capture/Compare Timer
Because of the 16-bit timer architecture, the I/O registers for the input
capture and output compare functions are pairs of 8-bit registers.
Because the counter is 16 bits long and preceded by a fixed
divide-by-four prescaler, the counter rolls over every 262,144 internal
clock cycles. Timer resolution with a 4-MHz crystal is 2 µs.
8.3.1 Input Capture
The input capture function can record the time at which an external event
occurs. When the input capture circuitry detects an active edge on the
input capture pin (TCAP), it latches the contents of the timer registers
into the input capture registers. The polarity of the active edge is
programmable.
Latching values into the input capture registers at successive edges of
the same polarity measures the period of the input signal on the TCAP
pin. Latching the counter values at successive edges of opposite polarity
measures the pulse width of the signal. Figure 8-3 shows the logic of the
input capture function.
15
$0019
0
$0018
8
7
TIMER REGISTER HIGH
TIMER REGISTER LOW
8
7
0
15
LATCH
EDGE
INPUT CAPTURE REGISTER HIGH
$0014
INPUT CAPTURE REGISTER LOW
$0015
TCAP
SELECT/DETECT
LOGIC
TIMER
INTERRUPT
REQUEST
TIMER CONTROL REGISTER
$0012
TIMER STATUS REGISTER
$0013
Figure 8-3. Input Capture Operation
Technical Data
92
MC68HC705C8A — Rev. 3
Capture/Compare Timer
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