Freescale Semiconductor, Inc.
Memory
Bootloader ROM
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Port A Data Register
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
$0000
(PORTA) Write:
See page 78.
Reset:
Read:
Unaffected by reset
PB4 PB3
Unaffected by reset
PC4 PC3
Port B Data Register
PB7
PC7
PB6
PC6
PB5
PB2
PB1
PB0
$0001
$0002
$0003
$0004
$0005
$0006
(PORTB) Write:
See page 81.
Reset:
Read:
Port C Data Register
PC5
SS
PC2
PC1
PC0
RDI
(PORTC) Write:
See page 85.
Reset:
Unaffected by reset
SCK MOSI
Read: PD7
MISO
TDO
Port D Fixed Input Register
(PORTD) Write:
See page 88.
Reset:
Read:
Unaffected by reset
Port A Data Direction
DDRA7 DDRA6 DDRA5 DDRA4
DDRA3
DDRA2 DDRA1 DDRA0
Register (DDRA) Write:
See page 79.
Reset:
0
0
0
0
0
DDRB3
0
0
0
0
Read:
Port B Data Direction
DDRB7 DDRB6 DDRB5 DDRB4
DDRB2 DDRB1 DDRB0
Register (DDRB) Write:
See page 82.
Reset:
0
0
0
0
0
0
0
Read:
Port C Data Direction
DDRC7 DDRC6 DDRC5 DDRC4
DDRC3
0
DDRC2 DDRC1 DDRC0
(DDRC) Write:
See page 86.
Reset:
0
0
0
0
0
0
0
$0007
$0008
$0009
Unimplemented
Unimplemented
Unimplemented
= Unimplemented
U = Unaffected
Figure 2-2. I/O Register Summary (Sheet 1 of 4)
MC68HC705C8A — Rev. 3
MOTOROLA
Technical Data
Memory
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