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MC705C8ACPE 参数 Datasheet PDF下载

MC705C8ACPE图片预览
型号: MC705C8ACPE
PDF下载: 下载PDF文件 查看货源
内容描述: 技术参数 [Technical Data]
分类和应用:
文件页数/大小: 222 页 / 1735 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Electrical Specifications  
5.0-Volt DC Electrical Characteristics  
13.7 5.0-Volt DC Electrical Characteristics  
(1)  
(2)  
Symbol  
Min  
Max  
Unit  
Characteristic  
Typ  
V
0.1  
OL  
Output voltage, I  
10.0 µA  
V
Load  
V
V
– 0.1  
V
DD  
OH  
Output high voltage  
I
= –0.8 mA, PA7–PA0, PB7–PB0, PC6–PC0, TCMP  
Load  
(see Figure 13-2)  
V
– 0.8  
V
V
OH  
DD  
I
I
= –1.6 mA, PD4–PD1 (see Figure 13-3)  
Load  
= –5.0 mA, PC7  
Load  
Output low voltage (see Figure 13-4)  
I
= 1.6 mA  
Load  
V
OL  
PA7–PA0, PB7–PB0, PC6–PC0, PD4–PD1  
= 20 mA, PC7  
0.4  
0.4  
I
Load  
Input high voltage  
V
0.7 x V  
V
PA7–PA0, PB7–PB0, PC7–PC0, PD5–PD0, PD7,  
TCAP, IRQ, RESET, OSC1  
V
V
IH  
DD  
DD  
Input low voltage  
V
V
0.2 x V  
DD  
PA7–PA0, PB7–PB0, PC7–PC0, PD5–PD0, PD7,  
TCAP, IRQ, RESET, OSC1  
IL  
SS  
V
EPROM programming voltage  
EPROM/OTPROM programming current  
User mode current  
14.5  
14.75  
5
15.0  
10  
V
mA  
mA  
V
PP  
I
PP  
I
± 10  
PP  
V
Data-retention mode (0°C to 70°C)  
2.0  
RM  
(3)  
Supply current  
(4)  
Run  
5.0  
1.95  
7.0  
3.0  
mA  
mA  
(5)  
Wait  
I
DD  
(6)  
Stop  
5.0  
5.0  
50  
50  
µµA  
µµA  
25°C  
–40°C to +85°C  
I/O ports hi-z leakage current  
I
± 10  
± 1  
µA  
µA  
IL  
PA7–PA0, PB7–PB0, PC7–PC0, PD4–PD1, PD7, RESET  
I
Input current, IRQ, TCAP, OSC1, PD0, PD5  
In  
Capacitance  
C
12  
8
Out  
Ports (as input or output)  
RESET, IRQ, TCAP, PD0–PD5, PD7  
pF  
C
In  
1. V = 5 V ± 10%; V = 0 Vdc, T = T to T , unless otherwise noted  
DD  
SS  
A
L
H
2. Typical values reflect average measurements at midpoint of voltage range at 25°C.  
3. I measured with port B pullup devices disabled.  
DD  
4. Run (operating) I measured using external square wave clock source (f  
= 4.2 MHz). All inputs 0.2 V from rail. No dc  
DD  
OSC  
loads. Less than 50 pF on all outputs. C = 20 pF on OSC2. OSC2 capacitance linearly affects run I  
.
DD  
L
5. Wait I measured using external square wave clock source (f  
= 4.2 MHz). All inputs 0.2 V from rail. No dc loads. Less  
DD  
OSC  
than 50 pF on all outputs. C = 20 pF on OSC2. V = 0.2 V, V = V – 0.2 V. All ports configured as inputs. SPI and SCI  
L
IL  
IH  
DD  
disabled. If SPI and SCI enabled, add 10% current draw. OSC2 capacitance linearly affects wait I  
.
DD  
6. Stop I measured with OSC1 = V . All ports configured as inputs. V = 0.2 V, V = V – 0.2 V.  
DD  
DD  
IL  
IH  
DD  
MC68HC705C8A — Rev. 3  
MOTOROLA  
Technical Data  
Electrical Specifications  
For More Information On This Product,  
Go to: www.freescale.com  
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