Freescale Semiconductor, Inc.
EPROM/OTPROM (PROM)
NOTE: PBPU0/COPC programmed to a 1 enables the port B pullup bit. This bit
is also used to clear the non-programmable COP (MC68HC05C4A
type). Writing to this bit to clear the COP will not affect the state of the
port B pull-up (bit 0). See 5.3.3 Programmable and
Non-Programmable COP Watchdog Resets.
When using the MC68HC705C8A in an MC68HC705C8 or
MC68HSC705C8 application, program locations $1FF0 and $1FF1 to
$00.
9.5.3 Mask Option Register 2
Mask option register 2 (MOR2) shown in Figure 9-6 is an EPROM
register that enables the non-programmable COP watchdog. Data from
MOR2 is latched on the rising edge of the voltage on the RESET pin.
See 5.3.3 Programmable and Non-Programmable COP Watchdog
Resets.
Address: $1FF1
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
NCOPE
Reset:
Erased:
Unaffected by reset
0
0
0
0
0
0
0
0
= Unimplemented
Figure 9-6. Mask Option Register 2 (MOR2)
NCOPE — Non-Programmable COP Watchdog Enable Bit
This EPROM bit enables the non-programmable COP watchdog.
1 = Non-programmable COP watchdog enabled
0 = Non-programmable COP watchdog disabled
Technical Data
118
MC68HC705C8A — Rev. 3
EPROM/OTPROM (PROM)
For More Information On This Product,
Go to: www.freescale.com
FREESCALE [ Freescale ]
