Freescale Semiconductor, Inc.
Serial Communications Interface (SCI)
I/O Registers
Table 17-5. Character Format Selection
Control Bits
PEN:PTY
Character Format
Start
Bits
Data
Bits
Stop
Bits
Character
Length
M
Parity
0
1
0
0
1
1
0X
0X
10
11
10
11
1
1
1
1
1
1
8
9
7
7
8
8
None
None
Even
Odd
1
1
1
1
1
1
10 Bits
11 Bits
10 Bits
10 Bits
11 Bits
11 Bits
Even
Odd
17.9.2 SCI Control Register 2
SCI control register 2:
• Enables the following CPU interrupt requests:
– Enables the SCTE bit to generate transmitter CPU interrupt
requests
– Enables the TC bit to generate transmitter CPU interrupt
requests
– Enables the SCRF bit to generate receiver CPU interrupt
requests
– Enables the IDLE bit to generate receiver CPU interrupt
requests
• Enables the transmitter
• Enables the receiver
• Enables SCI wakeup
• Transmits SCI break characters
MC68HC908AS60 — Rev. 1.0
Technical Data
Serial Communications Interface (SCI)
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