Freescale Semiconductor, Inc.
Technical Data — MC68HC908AS60
Section 8. Central Processor Unit (CPU)
8.1 Contents
8.2
8.3
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .114
8.4
CPU Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115
Accumulator (A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .116
Index Register (H:X). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .116
Stack Pointer (SP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .117
Program Counter (PC) . . . . . . . . . . . . . . . . . . . . . . . . . . . .118
Condition Code Register (CCR). . . . . . . . . . . . . . . . . . . . .119
8.4.1
8.4.2
8.4.3
8.4.4
8.4.5
8.5
Arithmetic/Logic Unit (ALU) . . . . . . . . . . . . . . . . . . . . . . . . . .121
8.6
8.6.1
8.6.2
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .121
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .121
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .121
8.7
8.8
8.9
CPU During Break Interrupts . . . . . . . . . . . . . . . . . . . . . . . . .122
Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . .122
Opcode Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .130
8.2 Introduction
This section describes the central processor unit (CPU08). The
M68HC08 CPU is an enhanced and fully object-code-compatible version
of the M68HC05 CPU. The CPU08 Reference Manual, Motorola
document order number CPU08RM/AD, contains a description of the
CPU instruction set, addressing modes, and architecture.
MC68HC908AS60 — Rev. 1.0
Technical Data
Central Processor Unit (CPU)
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