Infrared Serial Communications Interface Module (IRSCI)
INTERNAL BUS
SCR1
CKS
SL
SCP1
SCP0
SCR2
SCR0
SCI DATA REGISTER
PRE- BAUD
SCALER DIVIDER
CGMXCLK
BUS CLOCK
A
÷ 16
X
B
11-BIT
RECEIVE SHIFT REGISTER
SL = 0 => X = A
SL = 1 => X = B
DATA
RECOVERY
H
8
7
6
5
4
3
2
1
0
L
SCI_RxD
ALL 0s
BKF
RPF
M
RWU
SCRF
IDLE
WAKE
ILTY
WAKEUP
LOGIC
PEN
PTY
R8
PARITY
CHECKING
IDLE
ILIE
ILIE
DMARE
SCRF
SCRIE
DMARE
SCRIE
SCRF
SCRIE
DMARE
DMARE
OR
OR
ORIE
ORIE
NF
NF
NEIE
NEIE
FE
FE
FEIE
FEIE
PE
PE
PEIE
PEIE
Figure 12-8. SCI Receiver Block Diagram
12.5.3.1 Character Length
The receiver can accommodate either 8-bit or 9-bit data. The state of the M bit in IRSCI control register 1
(IRSCC1) determines character length. When receiving 9-bit data, bit R8 in IRSCI control register 2
(IRSCC2) is the ninth bit (bit 8). When receiving 8-bit data, bit R8 is a copy of the eighth bit (bit 7).
MC68HC908AP Family Data Sheet, Rev. 4
190
Freescale Semiconductor
FREESCALE [ Freescale ]
