Freescale Semiconductor, Inc.
Parallel Input/Output
Table 4-1. Port configuration
Input
pins
Output Bidirectional
Port
Alternate functions
pins
pins
A
B
C
D
E
F
—
—
—
—
8
—
8
Timer
—
8
High order address
Data bus
—
8
—
6
SPI and SCI1
—
—
8
A/D converter
—
—
—
—
Low order address
R/W on PG7
G
H
—
8
—
8
PWM and SCI2/3 (with MI BUS)
NOTE: Do not confuse pin function with the electrical state of that pin at reset.
All general-purpose I/O pins that are configured as inputs at reset are in
a high-impedance state and the contents of the port data registers are
undefined; in port descriptions, a ‘u’ indicates this condition. The pin
function is mode dependent.
4.3 Port A
Port A is an 8-bit bidirectional port, with both data and data direction
registers. In addition to their I/O capability, port A pins are shared with
timer functions, as shown in the following table.
Pin
Alternate function
PA0 IC3
PA1 IC2
PA2 IC1
PA3 OC5 and/or OC1, or IC4
PA4 OC4 and/or OC1
PA5 OC3 and/or OC1
PA6 OC2 and/or OC1
PA7 PAI and/or OC1
See Timing System
for more information.
On reset the pins are configured as general purpose high-impedance
inputs.
Technical Data
MC68HC11P2 — Rev 1.0
Parallel Input/Output
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