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MC68HC11P1CFN3 参数 Datasheet PDF下载

MC68HC11P1CFN3图片预览
型号: MC68HC11P1CFN3
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器 [Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 268 页 / 2323 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Pin Descriptions  
2.13.6 Port F  
Port F is an 8-bit general-purpose I/O port with a data register (PORTF)  
and a data direction register (DDRF). In single chip mode, port F pins are  
general-purpose I/O pins (PF[7:0]). In expanded mode, port F pins act  
as the low-order address lines (A[7:0]) of the address bus.  
PORTF can be read at any time: inputs return the pin level; outputs  
return the pin driver input level. If PORTF is written, the data is stored in  
internal latches. The pins are driven only if they are configured as  
outputs in single chip or bootstrap mode.  
Port F pins include on-chip pull-up devices that can be enabled or  
disabled.  
For further information, refer to Parallel Input/Output.  
2.13.7 Port G  
In normal modes, Port G is an 8-bit general-purpose I/O port with a data  
register (PORTG) and a data direction register (DDRG). Port G bit 7 is  
the R/W line in expanded mode; the remaining bits are always general  
purpose I/O.  
PORTG can be read at any time: inputs return the pin level; outputs  
return the pin driver input level. If PORTG is written, the data is stored in  
internal latches.The pins are driven only if they are configured as outputs  
in single chip or bootstrap mode. For further information, refer to Parallel  
Input/Output.  
Port G pins include on-chip pull-up devices that can be enabled or  
disabled.  
2.13.8 Port H  
Port H is an 8-bit general-purpose I/O port with a data register (PORTH)  
and a data direction register (DDRH). Port H pins support either  
input/output, SCI2 (bits [7:6]), SCI3 (bits [5:4]), or pulse-width  
Technical Data  
MC68HC11P2 — Rev 1.0  
Pin Descriptions  
For More Information On This Product,  
Go to: www.freescale.com  
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