Introduction
V
DD_IO
Power
Power
7
1
PHASEA0 (TA0, GPIOC4)
PHASEB0 (TA1, GPIOC5)
INDEX0 (TA2, GPIOC6)
HOME0 (TA3, GPIOC7)
Quadrature
1
1
1
1
V
DDA_ADC
DDA_OSC_PLL
Decoder 0
or Quad
Timer A or
GPIO
V
Power
1
5
V
SS
Ground
Ground
V
SSA_ADC
1
56F8166
SCLK0
1
1
1
1
OCR_DIS
1 - V
1
MOSI0
SPI0 or
GPIO
MISO0
V
4
CAP
Other
Supply
Ports
CAP
4
2
SS0 (GPIOE7)
V
1 & V
2
PP
PP
(SCLK1, GPIOC0)
(MOSI1, GPIOC1)
(MISO1, GPIOC2)
(SS1, GPIOC3)
1
1
1
1
CLKMODE
1
1
1
1
SPI 1 or
GPIO
PLL
and
Clock
EXTAL
XTAL
CLKO
A0 - A5 (GPIOA8 -
A6 - A7 (GPIOE2 - 3)
A8 - A15 (GPIOA0 - 7)
GPIOB0 (A16)
6
2
(GPIOC8 - 10)
GPIO
3
External
Address
Bus
8
1
or GPIO
PWMB0 - 5
6
3
4
PWMB or
GPIO
ISB0 - 2 (GPIOD10 - 12)
FAULTB0 - 3
External
Data Bus
or GPIO
D0-D6 (GPIOF9 - 15)
D7 - D15 (GPIOF0 -
7
9
ANA0 - 7
ADCA
ADCB
8
RD
WR
V
REF
1
1
5
8
External
Bus
Control
or GPIO
ANB0 - 7
PS (CS0)(GPIOD8)
1
DS (CS1)(GPIOD9)
GPIOD0 - 1 (CS2 - 3)
1
2
TXD0 (GPIOE0)
RXD0 (GPIOE1)
SCI 0 or
GPIO
1
1
QUAD
TIMER C or
GPIO
TC0 (GPIOE8)
(GPIOE10 - 11)
1
2
TXD1 (GPIOD6)
RXD1 (GPIOD7)
1
1
SCI 1
or GPIO
IRQA
1
TCK
TMS
IRQB
1
1
1
EXTBOOT
EMI_MODE
Interrupt/
Program
Control
1
1
1
1
JTAG/
EOnCE
Port
TDI
TDO
1
RESET
RSTO
1
1
TRST
1
Figure 2-2 56F8166 Signals Identified by Functional Group (144-pin LQFP)
1. Alternate pin functionality is shown in parenthesis; pin direction/type shown is the default functionality.
56F8366 Technical Data, Rev. 2.0
Freescale Semiconductor
Preliminary
17
FREESCALE [ Freescale ]
