CPM Electrical Characteristics
13.6 SCC in NMSI Mode Electrical Specifications
Table 22 provides the NMSI external clock timing.
Table 22. NMSI External Clock Timing
All Frequencies
Num
Characteristic
Unit
Min
Max
100 RCLK3 and TCLK3 width high 1
1/SYNCCLK
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
101 RCLK3 and TCLK3 width low
1/SYNCCLK +5
102 RCLK3 and TCLK3 rise/fall time
—
15.00
50.00
50.00
—
103 TXD3 active delay (from TCLK3 falling edge)
104 RTS3 active/inactive delay (from TCLK3 falling edge)
105 CTS3 setup time to TCLK3 rising edge
106 RXD3 setup time to RCLK3 rising edge
107 RXD3 hold time from RCLK3 rising edge 2
108 CD3 setup time to RCLK3 rising edge
0.00
0.00
5.00
5.00
5.00
5.00
—
—
—
1 The ratios SyncCLK/RCLK3 and SyncCLK/TCLK3 must be greater than or equal to 2.25/1.
2 Also applies to CD and CTS hold time when they are used as external sync signals.
Table 23 provides the NMSI internal clock timing.
Table 23. NMSI Internal Clock Timing
All Frequencies
Min Max
0.00 SYNCCLK/3 MHz
Num
Characteristic
Unit
100 RCLK3 and TCLK3 frequency 1
102 RCLK3 and TCLK3 rise/fall time
—
—
30.00
30.00
—
ns
ns
ns
ns
ns
ns
ns
103 TXD3 active delay (from TCLK3 falling edge)
104 RTS3 active/inactive delay (from TCLK3 falling edge)
105 CTS3 setup time to TCLK3 rising edge
106 RXD3 setup time to RCLK3 rising edge
107 RXD3 hold time from RCLK3 rising edge 2
108 CD3 setup time to RCLK3 rising edge
0.00
0.00
40.00
40.00
0.00
—
—
40.00
—
1 The ratios SyncCLK/RCLK3 and SyncCLK/TCLK3 must be greater or equal to 3/1.
2 Also applies to CD and CTS hold time when they are used as external sync signals
MPC875/MPC870 Hardware Specifications, Rev. 3.0
57
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
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