欢迎访问ic37.com |
会员登录 免费注册
发布采购

DSPA56371 参数 Datasheet PDF下载

DSPA56371图片预览
型号: DSPA56371
PDF下载: 下载PDF文件 查看货源
内容描述: 该DSP56371是5.0伏兼容的输入和输出的高密度CMOS器件。 [The DSP56371 is a high density CMOS device with 5.0-volt compatible inputs and outputs.]
分类和应用:
文件页数/大小: 124 页 / 1701 K
品牌: FREESCALE [ Freescale ]
 浏览型号DSPA56371的Datasheet PDF文件第1页浏览型号DSPA56371的Datasheet PDF文件第3页浏览型号DSPA56371的Datasheet PDF文件第4页浏览型号DSPA56371的Datasheet PDF文件第5页浏览型号DSPA56371的Datasheet PDF文件第6页浏览型号DSPA56371的Datasheet PDF文件第7页浏览型号DSPA56371的Datasheet PDF文件第8页浏览型号DSPA56371的Datasheet PDF文件第9页  
DSP56371 Overview  
2
12  
12  
11  
5
Memory Expansion Area  
Triple  
Timer  
ESAI_1  
Interface  
GPIO  
EFCOP  
SHI  
Interface  
ESAI  
Interface  
X Data  
RAM  
Y Data  
RAM  
Program  
RAM  
48K × 24  
36K × 24  
4K × 24  
ROM  
64K × 24  
ROM  
32K × 24  
ROM  
32K × 24  
2
DAX  
Peripheral  
Expansion Area  
YAB  
XAB  
PAB  
DAB  
Address  
Generation  
Unit  
Six Channel  
DMA Unit  
24-Bit  
Bootstrap  
ROM  
DSP56300  
Core  
DDB  
YDB  
XDB  
PDB  
GDB  
Internal  
Data  
Bus  
Switch  
Power  
Mngmnt.  
Clock  
Gen-  
erator  
4
Data ALU  
Program  
Interrupt  
Controller  
Program  
Decode  
Controller  
Program  
JTAG  
PLL  
+
Address  
24 × 24 56 56-bit MAC  
Two 56-bit Accumulators  
56-bit Barrel Shifter  
OnCE™  
Generator  
MODA/IRQA  
MODB/IRQB  
MODC/IRQC  
MODD/IRQD  
EXTAL  
RESET  
PINIT/NMI  
Figure 1. DSP56371 Block Diagram  
2.2  
DSP56300 Core Description  
The DSP56371 uses the DSP56300 core, a high-performance, single clock cycle per instruction engine that provides up to twice  
the performance of Motorola's popular DSP56000 core family while retaining code compatibility with it.  
The DSP56300 core family offers a new level of performance in speed and power, provided by its rich instruction set and low  
power dissipation, thus enabling a new generation of wireless, telecommunications and multimedia products. For a description  
of the DSP56300 core, see Section 2.4 DSP56300 Core Functional Blocks. Significant architectural enhancements to the  
DSP56300 core family include a barrel shifter, 24-bit addressing, an instruction patch module and direct memory access (DMA).  
The DSP56300 core family members contain the DSP56300 core and additional modules. The modules are chosen from a library  
of standard predesigned elements such as memories and peripherals. New modules may be added to the library to meet  
customer specifications. A standard interface between the DSP56300 core and the on-chip memory and peripherals supports a  
wide variety of memory and peripheral configurations. Refer to DSP56371 User Manual, Section 3, Memory Configuration.  
Core features are described fully in the DSP56300 Family Manual. Pinout, memory and peripheral features are described in this  
manual.  
2
DSP56371 Technical Data  
Freescale Semiconductor  
 复制成功!