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DSP56301VF100 参数 Datasheet PDF下载

DSP56301VF100图片预览
型号: DSP56301VF100
PDF下载: 下载PDF文件 查看货源
内容描述: 24位数字信号处理器 [24-Bit Digital Signal Processor]
分类和应用: 外围集成电路数字信号处理器时钟
文件页数/大小: 124 页 / 2296 K
品牌: FREESCALE [ Freescale ]
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DC Electrical Characteristics  
Table 2-3. DC Electrical Characteristics6 (Continued)  
Characteristics  
Symbol  
Min  
Typ  
Max  
Unit  
Input high voltage  
D[0–23], BG, BB, TA  
V
2.0  
2.0  
V
5.25  
V
V
IH  
CC  
1
1
MOD /IRQ , RESET, PINIT/NMI and all  
JTAG/ESSI/SCI/Timer/HI32 pins  
V
IHP  
8
EXTAL  
V
0.8 × V  
V
V
IHX  
CC  
CC  
Input low voltage  
1
1
D[0–23], BG, BB, TA, MOD /IRQ , RESET, PINIT  
V
–0.3  
–0.3  
–0.3  
0.8  
0.8  
0.2 × V  
V
V
V
IL  
All JTAG/ESSI/SCI/Timer/HI32 pins  
V
V
ILP  
ILX  
8
EXTAL  
CC  
Input leakage current  
I
I
–10  
–10  
10  
10  
μA  
μA  
IN  
High impedance (off-state) input current (@ 2.4 V / 0.4 V)  
TSI  
Output high voltage  
V
OH  
5,7  
TTL (I  
CMOS (I = –10 μA)  
= –0.4 mA)  
2.4  
– 0.01  
CC  
V
V
OH  
5
V
OH  
Output low voltage  
V
OL  
5,7  
TTL (I = 1.6 mA, open-drain pins I = 6.7 mA)  
0.4  
0.01  
V
V
OL  
OL  
5
CMOS (I = 10 μA)  
OL  
2
Internal supply current :  
80 MHz  
102  
6
100  
100 MHz  
127  
7.5  
In Normal mode  
I
mA  
mA  
μA  
CCI  
3
In Wait mode  
I
CCW  
4
In Stop mode  
I
100  
CCS  
PLL supply current  
1
2.5  
10  
mA  
pF  
5
Input capacitance  
C
IN  
Notes: 1. Refers to MODA/IRQA, MODB/IRQB, MODC/IRQC, and MODD/IRQD pins.  
2. Power Consumption Considerations on page 4-3 provides a formula to compute the estimated current requirements in  
Normal mode. To obtain these results, all inputs must be terminated (that is, not allowed to float). Measurements are based on  
synthetic intensive DSP benchmarks (see Appendix A). The power consumption numbers in this specification are 90 percent  
of the measured results of this benchmark. This reflects typical DSP applications. Typical internal supply current is measured  
with V = 3.0 V at T = 100°C.  
CC  
J
3. To obtain these results, all inputs must be terminated (that is, not allowed to float).  
4. To obtain these results, all inputs that are not disconnected at Stop mode must be terminated (that is, not allowed to float). PLL  
and XTAL signals are disabled during Stop state.  
5. Periodically sampled and not 100 percent tested.  
6.  
7. This characteristic does not apply to XTAL and PCAP.  
8. Driving EXTAL to the low V or the high V value may cause additional power consumption (DC current). To minimize  
V
= 3.3 V 0.3 V; T = –40°C to +100 °C, C = 50 pF  
CC J L  
IHX  
ILX  
power consumption, the minimum V  
should be no lower than  
IHX  
0.9 × V and the maximum V  
should be no higher than 0.1 × V  
.
CC  
CC  
ILX  
DSP56301 Technical Data, Rev. 10  
Freescale Semiconductor  
2-3  
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