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DSP56301VF100 参数 Datasheet PDF下载

DSP56301VF100图片预览
型号: DSP56301VF100
PDF下载: 下载PDF文件 查看货源
内容描述: 24位数字信号处理器 [24-Bit Digital Signal Processor]
分类和应用: 外围集成电路数字信号处理器时钟
文件页数/大小: 124 页 / 2296 K
品牌: FREESCALE [ Freescale ]
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Serial Communication Interface (SCI)  
Table 1-13. Enhanced Synchronous Serial Interface 1 (ESSI1) (Continued)  
State During  
Reset  
Signal Name  
Type  
Signal Description  
SRD1  
Input/Output  
Input  
Serial Receive Data  
Receives serial data and transfers it to the ESSI receive shift register. SRD1 is  
an input when data is being received.  
PD4  
Input or Output  
Port D 4  
The default configuration following reset is GPIO. For PD4, signal direction is  
controlled through PRR1. The signal can be configured as an ESSI signal  
SRD1 through PCR1.  
This input is 5 V tolerant.  
STD1  
PD5  
Input/Output  
Input  
Serial Transmit Data  
Transmits data from the serial transmit shift register. STD1 is an output when  
data is being transmitted.  
Input or Output  
Port D 5  
The default configuration following reset is GPIO. For PD5, signal direction is  
controlled through PRR1. The signal can be configured as an ESSI signal  
STD1 through PCR1.  
This input is 5 V tolerant.  
1.10 Serial Communication Interface (SCI)  
The Serial Communication interface (SCI) provides a full duplex port for serial communication with other DSPs,  
microprocessors, or peripherals such as modems.  
Table 1-14. Serial Communication Interface (SCI)  
State During  
Signal Name  
Type  
Signal Description  
Reset  
RXD  
Input  
Input  
Serial Receive Data  
Receives byte-oriented serial data and transfers it to the SCI receive shift  
register.  
PE0  
Input or Output  
Port E 0  
The default configuration following reset is GPIO. When configured as PE0,  
signal direction is controlled through the SCI Port Directions Register (PRR).  
The signal can be configured as an SCI signal RXD through the SCI Port  
Control Register (PCR).  
This input is 5 V tolerant.  
TXD  
PE1  
Output  
Input  
Serial Transmit Data  
Transmits data from SCI transmit data register.  
Input or Output  
Port E 1  
The default configuration following reset is GPIO. When configured as PE1,  
signal direction is controlled through the SCI PRR. The signal can be  
configured as an SCI signal TXD through the SCI PCR.  
This input is 5 V tolerant.  
DSP56301 Technical Data, Rev. 10  
Freescale Semiconductor  
1-19  
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