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AN1063D 参数 Datasheet PDF下载

AN1063D图片预览
型号: AN1063D
PDF下载: 下载PDF文件 查看货源
内容描述: 集成的处理器与DMA USERA ????手册 [Integrated Processor with DMA User’s Manual]
分类和应用:
文件页数/大小: 441 页 / 2488 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
S0  
S2  
S4  
S0  
S2  
S4  
S0  
S2  
S4  
S0  
S2 S4  
S0  
S2  
S4  
S0  
S2  
S4  
CLKOUT  
A31–A0  
FC3–FC0  
R/W  
AS  
DS  
SIZ0  
2 BYTES  
2 BYTES  
2 BYTES  
4 BYTES  
2 BYTES  
4 BYTES  
SIZ1  
DSACK0  
DSACK1  
D15–D8  
D7–D0  
OP0  
OP1  
OP2  
OP3  
OP0  
OP0  
OP1  
OP0  
OP1  
OP2  
OP3  
OP1  
WORD  
LONG WORD READ  
FROM 16-BIT BUS  
WRITE TO  
16-BIT BUS  
WORD READ  
FROM 16-BIT BUS  
LONG WORD WRITE TO  
16-BIT BUS  
Figure 3-5. Long-Word and Word Read and Write Timing—16-Bit Port  
The MC68340 drives the address bus with the desired address and drives the SIZx pins to  
indicate a long-word operand. For a read operation, the slave responds by placing the two  
most significant bytes of the operand on bits 15–0 of the data bus and asserting DSACK1  
to indicate a 16-bit port. The MC68340 reads the two most significant bytes of the operand  
(bytes 0 and 1) from bits 15–0. The MC68340 then decrements the transfer size counter  
by 2, increments the address by 2, initiates a new cycle, and reads bytes 2 and 3 of the  
operand from bits 15–0 of the data bus.  
For a write operation, the MC68340 drives the two most significant bytes of the operand  
on bits 15–0 of the data bus. The slave device then reads the two most significant bytes of  
the operand (bytes 0 and 1) from bits 15–0 of the data bus and asserts DSACK1 to  
indicate reception and a 16-bit port. The MC68340 then decrements the transfer size  
counter by 2, increments the address by 2, and writes bytes 2 and 3 of the operand to bits  
15–0 of the data bus.  
MOTOROLA  
MC68340 USER’S MANUAL  
3- 13  
For More Information On This Product,  
Go to: www.freescale.com  
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