Freescale Semiconductor, Inc.
Table 2-5. Signal Summary (Continued)
Signal Name
Transmit Data
Mnemonic
TxDA, TxDB
CTSA, CTSB
RTSB, RTSA
Input/Output
Active State
—
Three-State
Out
In
No
—
Clear-to-Send
Low
Request-to-Send/
OP1, OP0
Out/Out
Low/—
No
Serial Clock
SCLK
In
—
—
No
No
Transmitter Ready/OP6
T≈RDYA
R≈RDYA
Out/Out
Low/—
Receiver Ready/
FIFO Full/OP4
Out/Out/Out
Low/Low/—
DMA Request
DMA Acknowledge
DMA Done
DREQ2, DREQ1
DACK2, DACK1
DONE2, DONE1
In
Out
I/O
In
Low
Low
Low
Low
—
No
No
—
Timer Gate
TGATE2,
TGATE1
Timer Input
TIN2, TIN1
TOUT2, TOUT1
TCK
In
Out
In
—
—
—
Yes
—
Timer Output
Test Clock
—
Test Mode Select
Test Data In
TMS
In
High
High
High
—
—
TDI
In
—
Test Data Out
Synchronizer Power
TDO
Out
–
—
V
—
CCSYN
System Power Supply and
Return
V
CC
, GND
–
—
—
MOTOROLA
MC68340 USER’S MANUAL
2- 15
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