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AN1063D 参数 Datasheet PDF下载

AN1063D图片预览
型号: AN1063D
PDF下载: 下载PDF文件 查看货源
内容描述: 集成的处理器与DMA USERA ????手册 [Integrated Processor with DMA User’s Manual]
分类和应用:
文件页数/大小: 441 页 / 2488 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
OP0—Output Port 0/RTSA  
1 = The OP0/RTSA pin functions as the ready-to-send signal for channel A. The  
signal is asserted and negated according to the configuration programmed by  
RxRTS bit 7 in the MR1A for the receiver and TxRTS bit 5 in the MR2A for the  
transmitter.  
0 = The OP0/RTSA pin functions as a dedicated output. The signal reflects the  
complement of the value of bit 0 of the OP.  
7.4.1.16 OUTPUT PORT DATA REGISTER (OP). The bits in the OP register are set by  
performing a bit set command (writing to offset $71E) and are cleared by performing a bit  
reset command (writing to offset $71F). This register can only be written when the serial  
module is enabled (i.e., the STP bit in the MCR is cleared).  
Bit Set  
OP  
7
$71E  
6
5
4
3
2
1
0
OP7  
OP6  
OP5  
OP4  
OP3  
OP2  
OP1  
OP0  
RESET:  
0
0
0
0
0
0
0
0
Write Only  
Supervisor/User  
NOTE  
OP bits 7, 5, 3, and 2 are not pinned out on the MC68340;  
thus, changing these bits has no effect.  
OP6, OP4, OP1, OP0—Output Port Parallel Outputs  
1 = These bits can be set by writing a one to the bit position(s) at this address.  
0 = These bits are not affected by writing a zero to this address.  
Bit Reset  
OP  
7
$71F  
0
6
5
4
3
2
1
OP7  
OP6  
OP5  
OP4  
OP3  
OP2  
OP1  
OP0  
RESET:  
0
0
0
0
0
0
0
0
Write Only  
Supervisor/User  
NOTE  
OP bits 7, 5, 3, and 2 are not pinned out on the MC68340;  
thus, changing these bits has no effect.  
OP6, OP4, OP1, OP0—Output Port Parallel Outputs  
1 = These bits can be cleared by writing a one to the bit position(s) at this address.  
0 = These bits are not affected by writing a zero to this address.  
MOTOROLA  
MC68340 USER’S MANUAL  
7- 37  
For More Information On This Product,  
Go to: www.freescale.com  
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