Freescale Semiconductor, Inc.
COMMANDS TRANSMITTED TO THE CPU32
COMMAND CODE TRANSMITTED DURING THIS CYCLE
HIGH-ORDER 16 BITS OF MEMORY ADDRESS
LOW-ORDER 16 BITS OF MEMORY ADDRESS
NONSERIAL-RELATED ACTIVITY
SEQUENCE TAKEN IF
OPERATION HAS NOT
COMPLETED
NEXT
COMMAND
CODE
READ
LS ADDR
READ (LONG)
???
MS ADDR
"NOT READY"
XXX
"NOT READY"
MEMORY
"NOT READY"
LOCATION
XXXXXX
MS RESULT
NEXT CMD
LS RESULT
XXX
"ILLEGAL"
NEXT CMD
"NOT READY"
XXX
NEXT CMD
BERR/AERR
"NOT READY"
DATA UNUSED FROM
THIS TRANSFER
SEQUENCE TAKEN IF BUS ERROR
OR ADDRESS ERROR OCCURS ON
MEMORY ACCESS
SEQUENCE TAKEN IF
ILLEGAL COMMAND
IS RECEIVED BY CPU32
HIGH- AND LOW-ORDER
S OF RESULT
RESULTS FROM PREVIOUS COMMAND
RESPONSES FROM THE CPU
.
1
.
......
6
.
.
.
...
B
.
.
.... .
I
T
Figure 5-27. Command-Sequence Diagram
5.6.2.8.3 Command Set Summary. The BDM command set is summarized in Table 5-23.
Subsequent paragraphs contain detailed descriptions of each command.
MOTOROLA
MC68340 USER’S MANUAL
5- 75
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