11/2/95
SECTION 1: OVERVIEW
UM Rev 1
Freescale Semiconductor, Inc.
TABLE OF CONTENTS (Continued)
Paragraph
Number
Page
Number
Title
8.3.3
8.3.4
8.3.5
8.3.6
8.3.7
8.3.8
8.3.9
8.3.9.1
8.3.9.2
8.3.9.3
8.4
8.4.1
8.4.2
8.4.3
8.4.4
8.4.5
8.4.6
8.4.7
8.4.8
8.5
Variable Duty-Cycle Square-Wave Generator........................................8-9
Variable-Width Single-Shot Pulse Generator.........................................8-10
Pulse-Width Measurement..........................................................................8-12
Period Measurement....................................................................................8-13
Event Count...................................................................................................8-14
Timer Bypass.................................................................................................8-16
Bus Operation................................................................................................8-17
Read Cycles...............................................................................................8-17
Write Cycles...............................................................................................8-17
Interrupt Acknowledge Cycles................................................................8-17
Register Description.........................................................................................8-17
Module Configuration Register (MCR)......................................................8-18
Interrupt Register (IR) ...................................................................................8-20
Control Register (CR)...................................................................................8-20
Status Register (SR).....................................................................................8-23
Counter Register (CNTR) ............................................................................8-25
Preload 1 Register (PREL1)........................................................................8-25
Preload 2 Register (PREL2)........................................................................8-26
Compare Register (COM)............................................................................8-26
Timer Module Initialization Sequence..........................................................8-27
Timer Module Configuration.......................................................................8-27
Timer Module Example Configuration Code...........................................8-28
8.5.1
8.5.2
Section 9
IEEE 1149.1 Test Access Port
9.1
9.2
9.3
9.4
9.4.1
9.4.2
9.4.3
9.4.4
9.5
Overview.............................................................................................................9-1
TAP Controller...................................................................................................9-2
Boundary Scan Register.................................................................................9-3
Instruction Register...........................................................................................9-9
EXTEST (000)...............................................................................................9-10
SAMPLE/PRELOAD (001)..........................................................................9-10
BYPASS (X1X, 101).....................................................................................9-11
HI-Z (100).......................................................................................................9-11
MC68340 Restrictions......................................................................................9-11
Non-IEEE 1149.1 Operation...........................................................................9-12
9.6
Section 10
Applications
10.1
10.1.1
Minimum System Configuration...................................................................10-1
Processor Clock Circuitry..........................................................................10-1
MOTOROLA
MC68340 USER'S MANUAL
xv
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