11/2/95
SECTION 1: OVERVIEW
UM Rev 1
Freescale Semiconductor, Inc.
TABLE OF CONTENTS (Continued)
Paragraph
Number
Page
Number
Title
7.1.5
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.2.8
7.2.8.1
7.2.8.2
7.2.9
7.2.9.1
7.2.9.2
7.2.10
7.2.11
7.2.12
7.2.12.1
7.2.12.2
7.2.13
7.2.13.1
7.2.13.2
7.2.13.3
7.3
Comparison of Serial Module to MC68681.............................................7-4
Serial Module Signal Definitions...................................................................7-4
Crystal Input or External Clock (X1)..........................................................7-5
Crystal Output (X2).......................................................................................7-5
External Input (SCLK)..................................................................................7-6
Channel A Transmitter Serial Data Output (TxDA).................................7-6
Channel A Receiver Serial Data Input (RxDA)........................................7-6
Channel B Transmitter Serial Data Output (TxDB).................................7-6
Channel B Receiver Serial Data Input (RxDB)........................................7-6
Channel A Request-To-Send (RTSA) ......................................................7-6
RTSA...........................................................................................................7-6
OP0..............................................................................................................7-6
Channel B Request-To-Send (RTSB).......................................................7-6
RTSB...........................................................................................................7-7
OP1..............................................................................................................7-7
Channel A Clear-To-Send (CTSA) ...........................................................7-7
Channel B Clear-To-Send (CTSB)............................................................7-7
Channel A Transmitter Ready (T≈RDYA).................................................7-7
T≈RDYA......................................................................................................7-7
OP6..............................................................................................................7-7
Channel A Receiver Ready (R≈RDYA).....................................................7-7
R≈RDYA......................................................................................................7-7
FFULLA.......................................................................................................7-7
OP4..............................................................................................................7-7
Operation............................................................................................................7-8
Baud Rate Generator...................................................................................7-8
Transmitter and Receiver Operating Modes............................................7-8
Transmitter .................................................................................................7-10
Receiver......................................................................................................7-11
FIFO Stack..................................................................................................7-12
Looping Modes.............................................................................................7-14
Automatic Echo Mode..............................................................................7-14
Local Loopback Mode.............................................................................7-14
Remote Loopback Mode.........................................................................7-14
Multidrop Mode.............................................................................................7-15
Bus Operation................................................................................................7-17
Read Cycles...............................................................................................7-17
Write Cycles...............................................................................................7-17
Interrupt Acknowledge Cycles................................................................7-17
Register Description and Programming.......................................................7-17
Register Description.....................................................................................7-17
Module Configuration Register (MCR)..................................................7-19
7.3.1
7.3.2
7.3.2.1
7.3.2.2
7.3.2.3
7.3.3
7.3.3.1
7.3.3.2
7.3.3.3
7.3.4
7.3.5
7.3.5.1
7.3.5.2
7.3.5.3
7.4
7.4.1
7.4.1.1
MOTOROLA
MC68340 USER'S MANUAL
xiii
For More Information On This Product,
Go to: www.freescale.com
FREESCALE [ Freescale ]
