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AN1063D 参数 Datasheet PDF下载

AN1063D图片预览
型号: AN1063D
PDF下载: 下载PDF文件 查看货源
内容描述: 集成的处理器与DMA USERA ????手册 [Integrated Processor with DMA User’s Manual]
分类和应用:
文件页数/大小: 441 页 / 2488 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
the MCR disables the software watchdog and periodic interrupt timer, and setting the  
FRZ0 bit in the MCR disables the bus monitor.  
4.3 PROGRAMMING MODEL  
Figure 4-8 is a programming model (register map) of all registers in the SIM40. For more  
information about a particular register, refer to the description of the module or function  
indicated in the right column. The ADDR (address) column indicates the offset of the  
register from the address stored in the module base address register. The FC (function  
code) column indicates whether a register is restricted to supervisor access (S) or  
programmable to exist in either supervisor or user space (S/U).  
For the registers discussed in the following pages, the number in the upper right-hand  
corner indicates the offset of the register from the address stored in the module base  
address register. The numbers on the top line of the register represent the bit position in  
the register. The second line contains the mnemonic for the bit. The numbers below the  
register represent the bit values after a hardware reset. The access privilege is indicated  
in the lower right-hand corner.  
NOTE:  
A CPU32 RESET instruction will not affect any of the SIM40  
registers.  
4- 18  
MC68340 USER’S MANUAL  
MOTOROLA  
For More Information On This Product,  
Go to: www.freescale.com  
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