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68HC912DG128PV8 参数 Datasheet PDF下载

68HC912DG128PV8图片预览
型号: 68HC912DG128PV8
PDF下载: 下载PDF文件 查看货源
内容描述: M68HC12微控制器 [M68HC12 Microcontrollers]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 452 页 / 3509 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Operating Modes  
INITRM — Initialization of Internal RAM Position Register  
$0010  
Bit 7  
RAM15  
0
6
RAM14  
0
5
RAM13  
1
4
0
0
3
0
0
2
0
0
1
0
0
Bit 0  
0
0
RESET:  
RAM[15:13] — Internal RAM map position  
These bits specify the upper three bits of the 16-bit RAM address.  
Normal modes: write once; special modes: write anytime. Read  
anytime.  
5.5.3 EEPROM Mapping  
The MC68HC912DG128 has 2K bytes of EEPROM which is activated by  
the EEON bit in the INITEE register. Mapping of internal EEPROM is  
controlled by four bits in the INITEE register. After reset EEPROM  
address space begins at location $0800 but can be mapped to any 4K  
byte boundary within the standard 64K byte address space. The  
EEPROM block occupies the last 2K bytes of the 4K byte block.  
INITEE— Initialization of Internal EEPROM Position Register  
$0012  
Bit 7  
EE15  
0
6
EE14  
0
5
EE13  
0
4
EE12  
0
3
0
0
2
0
0
1
0
0
Bit 0  
EEON  
1
RESET:  
EE[15:12] — Internal EEPROM map position  
These bits specify the upper four bits of the 16-bit EEPROM address.  
Normal modes: write once; special modes: write anytime. Read  
anytime.  
EEON — internal EEPROM On (Enabled)  
This bit is forced to one in single-chip modes.  
Read or write anytime.  
0 = Removes the EEPROM from the map.  
1 = Places the on-chip EEPROM in the memory map at the address  
selected by EE[15:12].  
Technical Data  
MC68HC912DG128 — Rev 3.0  
Operating Modes  
For More Information On This Product,  
Go to: www.freescale.com  
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