Freescale Semiconductor, Inc.
Operating Modes
Special Expanded Narrow Mode — This mode can be used
for emulation of normal expanded narrow mode. Ports A and B
are used for the16-bit address bus. Port A is used as the data
bus, multiplexed with addresses. In this mode, 16-bit data is
presented one byte at a time, the high byte followed by the low
byte. The address is automatically incremented on the second
cycle.
Special Peripheral Mode — The CPU is not active in this
mode. An external master can control on-chip peripherals for
testing purposes. It is not possible to change to or from this
mode without going through reset. Background debugging
should not be used while the MCU is in special peripheral
mode as internal bus conflicts between BDM and the external
master can cause improper operation of both modes.
Bit 7
6
5
4
3
IVIS
1
2
1
EMK
1
Bit 0
SMODN
MODB
MODA
ESTR
EBSWAI
EME
RESET:
RESET:
RESET:
RESET:
RESET:
RESET:
RESET:
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
0
0
0
Special Single Chip
Special Exp Nar
Peripheral
1
1
1
1
1
1
Special Exp Wide
Normal Single Chip
Normal Exp Nar
Normal Exp Wide
$000B
0
0
0
0
0
0
MODE — Mode Register
5.4 Background Debug Mode
Background debug mode (BDM) is an auxiliary operating mode that is
used for system development. BDM is implemented in on-chip hardware
and provides a full set of debug operations. Some BDM commands can
be executed while the CPU is operating normally. Other BDM
commands are firmware based, and require the BDM firmware to be
enabled and active for execution.
Technical Data
MC68HC912DG128 — Rev 3.0
Operating Modes
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