Freescale Semiconductor, Inc.
Technical Data — MC68HC912DG128
Section 5. Operating Modes
5.1 Contents
5.2
5.3
5.4
5.5
5.6
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75
Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75
Background Debug Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . .78
Internal Resource Mapping. . . . . . . . . . . . . . . . . . . . . . . . . . . .81
Memory Maps. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93
5.2 Introduction
Eight possible operating modes determine the operating configuration of
the MC68HC912DG128. Each mode has an associated default memory
map and external bus configuration. After reset, most system resources
can be mapped to other addresses by writing to the appropriate control
registers.
5.3 Operating Modes
The operating mode out of reset is determined by the states of the
BKGD, MODB, and MODA pins during reset.
The SMODN, MODB, and MODA bits in the MODE register show current
operating mode and provide limited mode switching during operation.
The states of the BKGD, MODB, and MODA pins are latched into these
bits on the rising edge of the reset signal.
In expanded modes, all address space not used by internal resources is
by default external memory.
MC68HC912DG128 — Rev 3.0
Technical Data
Operating Modes
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