Freescale Semiconductor, Inc.
Pinout and Signal Descriptions
Power Supply Pins
3.3.5 VDDPLL, VSSPLL
Provides operating voltage and ground for the Phase-Locked Loop. This
allows the supply voltage to the PLL to be bypassed independently.
NOTE: The VSSPLL pin should always be grounded even if the PLL is not used.
The VDDPLL pin should not be left floating. It is recommended to
connect the VDDPLL pin to ground if the PLL is not used.
3.3.6 XFC
PLL loop filter. Please see Appendix: CGM Practical Aspects for
information on how to calculate PLL loop filter elements. Any current
leakage on this pin must be avoided.
VDDPLL
C0
MCU
Cp
R0
XFC
Figure 3-3. PLL Loop FIlter Connections
If VDDPLL is connected to VSS (this is normal case), then the XFC pin
should either be left floating or connected to VSS (never to VDD). If
VDDPLL is tied to VDD but the PLL is switched off (PLLON bit cleared),
then the XFC pin should be connected preferably to VDDPLL (i.e. ready
for VCO minimum frequency).
3.3.7 VFP
Flash EEPROM program/erase voltage and supply voltage during
normal operation.
MC68HC912DG128 — Rev 3.0
Technical Data
Pinout and Signal Descriptions
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