Freescale Semiconductor, Inc.
Input/Output (I/O) Ports
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Port A Data Register
PTA7
PTA6
PTA5
PTA4
PTA3
PTA2
PTA1
PTA0
$0000
(PTA) Write:
See page 177.
Reset:
Read:
Unaffected by reset
PTB3
Port B Data Register
PTB2
PTB1
PTB0
$0001
$0004
$0005
(PTB) Write:
See page 180.
Reset:
Read:
Unaffected by reset
Data Direction Register A
DDRA7 DDRA6 DDRA5 DDRA4 DDRA3 DDRA2 DDRA1 DDRA0
(DDRA) Write:
See page 178.
Reset:
Read:
0
MCLKEN
0
0
0
0
0
0
0
0
0
Data Direction Register B
DDRB3 DDRB2 DDRB1 DDRB0
(DDRB) Write:
See page 181.
Reset:
0
0
0
0
0
0
0
= Unimplemented
Figure 13-1. I/O Port Register Summary
Advance Information
176
MC68HC908RFRK2
MOTOROLA
Input/Output (I/O) Ports
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