Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
Depending on the programming option selected in the mask option register 1
(MOR1), the IRQ pin will trigger this interrupt on either a negative-going edge at
the IRQ pin and/or while the IRQ pin is held in the low state. In either case, the IRQ
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2
pin must be held low for at least one t
time period. If the edge- and
ILIH
level-sensitive edge is programmed in the MOR1,the IRQ input requires an
external resistor connected to V for wired-OR operation. If the IRQ pin is not
DD
3
used, it must be tied to the V supply. The IRQ pin contains an internal Schmitt
DD
trigger as part of its input circuitry to improve noise immunity. For further
information, refer to SECTION 4 INTERRUPTS.
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5
NOTE
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If the voltage level applied to the IRQ pin exceeds V , it may affect
the MCU’s mode of operation. See SECTION 6 OPERATING
MODES.
DD
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A
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INTRODUCTION
MC68HC805P18
1-8
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