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68HC705PL4B 参数 Datasheet PDF下载

68HC705PL4B图片预览
型号: 68HC705PL4B
PDF下载: 下载PDF文件 查看货源
内容描述: 工业标准的8位M68HC05 CPU核心 [Industry standard 8-bit M68HC05 CPU core]
分类和应用:
文件页数/大小: 98 页 / 1158 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
April 30, 1998  
GENERAL RELEASE SPECIFICATION  
PGM – EPROM ProGraM command  
0 = Programming power is switched OFF from EPROM array.  
1 = Programming power is switched ON to EPROM array. If ELAT 1,  
then PGM = 0.  
A.4.2 Programming Sequence  
The EPROM programming sequence is:  
1. Set the ELAT bit  
2. Write the data to the address to be programmed  
3. Set the PGM bit  
4. Delay for a time t  
PGMR  
5. Clear the PGM bit  
6. Clear the ELAT bit  
The last two steps must be performed with separate CPU writes.  
CAUTION  
It is important to remember that an external programming voltage  
must be applied to the V pin while programming, but it should be  
PP  
equal to V during normal operations.  
DD  
Figure A-2 shows the o w required to successfully program the EPROM.  
A.5 EPROM PROGRAMMING SPECIFICATIONS  
Table A-2. EPROM Programming Electrical Characteristics  
(V = 4V ±10%, V = 0 Vdc, T = 0°C to +70°C, unless otherwise noted)  
DD  
SS  
A
Characteristic  
Symbol  
Min  
Typ  
12.5  
5
Max  
Unit  
V
Programming Voltage  
Programming Current  
Programming Time per byte  
V
PP  
I
10  
mA  
ms  
PP  
t
1
EPGM  
MC68HC05PL4  
REV 2.0  
A-3  
For More Information On This Product,  
Go to: www.freescale.com