Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
April 30, 1998
$0000
I/O REGISTERS
32 BYTES
$001F
$0020
USER RAM
256 BYTES
STACK
64 BYTES
$00C0
$00FF
$011F
$0120
UNUSED
$0DFF
$0E00
USER EPROM
4096 BYTES
RESERVED
RESERVED
KEYBOARD
8-BIT TIMER
16-BIT TIMER
IRQ
$1FF0-$1FF1
$1FF2-$1FF3
$1FF4-$1FF5
$1FF6-$1FF7
$1FF8-$1FF9
$1FFA-$1FFB
$1FFC-$1FFD
$1FFE-$1FFF
$1DFF
$1E00
BOOTSTRAP ROM
496 BYTES
$1FEF
$1FF0
USER VECTORS
16 BYTES
SWI
RESET
$1FFF
Figure A-1. MC68HC705PL4B Memory Map
A.4.1 EPROM Program Control Register (PCN)
This register is provided for programming the on-chip EPROM in the
MC68HC705PL4.
bit-7
bit-6
bit-5
bit4
bit-3
bit-2
bit1
ELAT
0
bit-0
PGM
0
Read
Write
Reset
PCR
$001E
RESERVED
0
0
0
0
0
0
ELAT – EPROM LATch control
0 = EPROM address and data bus con gured f or normal reads
1 = EPROM address and data bus con gured for programming (writes
to EPROM cause address and data to be latched). EPROM is in
programming mode and cannot be read if ELAT is 1. This bit should
not be set when no programming voltage is applied to the V pin.
PP
MC68HC05PL4
REV 2.0
A-2
For More Information On This Product,
Go to: www.freescale.com
FREESCALE [ Freescale ]
