Freescale Semiconductor, Inc.
April 30, 1998
GENERAL RELEASE SPECIFICATION
APPENDIX A
MC68HC705PL4
This appendix describes the MC68HC705PL4 and MC68HC705PL4B, the emula-
tion parts for MC68HC05PL4 and MC68HC05PL4B respectively. The entire
MC68HC05PL4 data sheet applies to the MC68HC705PL4 and
MC68HC705PL4B, with exceptions outlined in this appendix.
References to MC68HC705PL4 in this appendix refers to both the
MC68HC705PL4 and MC68HC705PL4B devices, unless otherwise stated.
A.1 INTRODUCTION
The MC68HC705PL4 is an EPROM version of the MC68HC705PL4, and the
MC68HC705PL4B is an EPROM version of the MC68HC705PL4B. Both HC705
parts are used as the emulation part for their MC68HC05 counterparts. Both
MC68HC705 parts are functionally identical to their MC68HC05 counterparts,
with the exception of the 4k-bytes user ROM is replaced by 4k-bytes user
EPROM.
Table A-1. MC68HC705PL4 and MC68HC705PL4B Differences
Device
Pin27
PA0
MC68HC705PL4
MC68HC705PL4B
OSC2
A.2 MEMORY
The MC68HC705PL4 memory map is shown on Figure A-1.
A.3 BOOTLOADER MODE
Bootloader mode is entered upon the rising edge of RESET if LED/IRQ/V pin is
PP
at V
and PB0/KBI0 at V . The Bootloader program is masked in the ROM
TST
DD
area from $1E00 to $1FEF. This program handles copying of user code from an
external EPROM into the on-chip EPROM. The bootload function has to be done
from an external EPROM. The bootloader performs one programming pass at
1ms per byte then does a verify pass.
A.4 EPROM PROGRAMMING
Programming the on-chip EPROM is achieved by using the Program Control Reg-
ister located at address $001E.
Please contact Freescale for programming board availability.
MC68HC05PL4
REV 2.0
A-1
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