Freescale Semiconductor, Inc.
Me m ory
Addr.
Register
R/W Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
0
0
$0000
Port A Data, PORTA
PA5
PA4
PA3
PA2
PA1
PA0
$0001
$0002
Port B Data, PORTB
* Port C Data, PORTC
PB7
PC7
PB6
PC6
PB5
PC5
INV
PB4
PC4
PB3
PC3
PB2
PC2
PB1
PC1
PB0
PC0
$0003
$0004
$0005
$0006
$0007
Analog MUX Register, AMUX
Port A Data Direction, DDRA
Port B Data Direction, DDRB
* Port C Data Direction, DDRC
Unimplemented
HOLD DHOLD
VREF
MUX4
MUX3
MUX2
MUX1
0
0
DDRA5 DDRA4 DDRA3 DDRA2 DDRA1 DDRA0
DDRB7 DDRB6 DDRB5 DDRB4 DDRB3 DDRB2 DDRB1 DDRB0
DDRC7 DDRC6 DDRC5 DDRC4 DDRC3 DDRC2 DDRC1 DDRC0
Read: CTOF
Write:
RTIF
6
0
0
$0008 CTimer Status/Control, CTSCR
CTOFE
5
RTIE
4
RT1
1
RT0
CTOFR RTIFR
Read: BIT7
Write:
3
2
BIT0
$0009
$000A
$000B
$000C
$000D
$000E
$000F
CTimer Counter, CTCR
Serial Control, SCR
Read:
SPIE
Write:
0
SPIR
0
SPE
LSBF
0
MSTR
0
CPHA
0
SPR1
0
SPR0
0
Read: SPIF
Write:
DCOL
Serial Status, SSR
Read:
BIT7
Serial Data, SDR
6
5
4
3
2
0
1
BIT0
0
Write:
Read:
IRQE
Write:
0
IRQF
0
IRQ Status & Control, ISCR
PEPROM Bit Select, PEBSR
OM2
OM1
R
IRQR
Read:
PEB7
Write:
PEB6
0
PEB5
PEPGM
PEB4
0
PEB3
PEB2
PEB1
PEB0
Read: PEDATA
Write:
0
0
0
PEPZRF
PEPROM Status/Control,
PESCR
R
R
R
= Unimplemented
R
= Reserved
Figure 2-3. I/O Registers $0000–$000F
* Features related to port C are only available on the 28-pin MC68HC705JP7 devices.
General Release Specification
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
Memory
For More Information On This Product,
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