Freescale Semiconductor, Inc.
Instruc tion Se t
Table 14-6. Instruction Set Summary (Continued)
Effect on
Source
Form
CCR
Operation
Description
M oed
H I N Z C
C
O
A
O
dd
ff
ROR opr
RORA
RORX
ROR opr,X
ROR ,X
DIR
INH
36
46
56
66
76
5
3
3
6
5
C
Rotate Byte Right through Carry Bit
— — ↕ ↕ ↕ INH
b7
b0
IX1
IX
RSP
Reset Stack Pointer
Return from Interrupt
SP ← $00FF
— — — — —
INH
9C
2
SP ← (SP) + 1; Pull (CCR)
SP ← (SP) + 1; Pull (A)
SP ← (SP) + 1; Pull (X)
SP ← (SP) + 1; Pull (PCH)
SP ← (SP) + 1; Pull (PCL)
RTI
↕ ↕ ↕ ↕ ↕ INH
80
9
SP ← (SP) + 1; Pull (PCH)
SP ← (SP) + 1; Pull (PCL)
RTS
Return from Subroutine
— — — — —
INH
81
6
ii
dd
hh ll
ee ff
ff
SBC #opr
SBC opr
SBC opr
SBC opr,X
SBC opr,X
SBC ,X
IMM
DIR
EXT
IX2
IX1
IX
A2
B2
C2
D2
E2
F2
2
3
4
5
4
3
Subtract Memory Byte and Carry Bit from
Accumulator
A ← (A) – (M) – (C)
— — ↕ ↕ ↕
SEC
SEI
Set Carry Bit
C ← 1
I ← 1
— — — — 1
— 1 — — —
INH
INH
99
9B
2
2
Set Interrupt Mask
dd
hh ll
ee ff
ff
STA opr
STA opr
STA opr,X
STA opr,X
STA ,X
DIR
EXT
IX2
IX1
IX
B7
C7
D7
E7
F7
4
5
6
5
4
Store Accumulator in Memory
M ← (A)
— — ↕ ↕ —
— 0 — — —
— — ↕ ↕ —
STOP
Stop Oscillator and Enable IRQ/VPP Pin
Store Index Register In Memory
INH
8E
2
dd
hh ll
ee ff
ff
STX opr
STX opr
STX opr,X
STX opr,X
STX ,X
DIR
EXT
IX2
IX1
IX
BF
CF
DF
EF
FF
4
5
6
5
4
M ← (X)
ii
dd
hh ll
ee ff
ff
SUB #opr
SUB opr
SUB opr
SUB opr,X
SUB opr,X
SUB ,X
IMM
DIR
EXT
IX2
IX1
IX
A0
B0
C0
D0
E0
F0
2
3
4
5
4
3
Subtract Memory Byte from Accumulator
A ← (A) – (M)
— — ↕ ↕ ↕
PC ← (PC) + 1; Push (PCL)
SP ← (SP) – 1; Push (PCH)
SP ← (SP) – 1; Push (X)
SP ← (SP) – 1; Push (A)
SP ← (SP) – 1; Push (CCR)
SP ← (SP) – 1; I ← 1
SWI
TAX
Software Interrupt
— 1 — — —
— — — — —
INH
INH
83
97
10
2
PCH ← Interrupt Vector High Byte
PCL ← Interrupt Vector Low Byte
Transfer Accumulator to Index Register
X ← (A)
General Release Specification
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
Instruction Set
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