General
Table 4. Absolute Maximum Ratings (VSS = 0 V, VSSA = 0 V) (continued)
Characteristic
Symbol
VIN
Notes1
Pin Groups 1, 2
Pin Group 4
Pin Group 3
Min
-0.3
-0.4
-0.3
—
Max
5.5
Unit
V
Digital Input Voltage Range
Oscillator Input Voltage Range
VOSC
VINA
VIC
4.0
V
Analog Input Voltage Range
4.0
V
Input clamp current, per pin (VIN < VSS - 0.3 V)2, 3
Output clamp current, per pin4
-5.0
20.0
25
mA
mA
mA
VOC
—
Contiguous pin DC injection current—regional limit sum
of 16 contiguous pins
IICont
-25
Output Voltage Range (normal push-pull mode)
Output Voltage Range (open drain mode)
DAC Output Voltage Range
VOUT
VOUTOD
VOUT_DAC
TA
Pin Group 1
Pin Group 2
Pin Group 5
-0.3
-0.3
-0.3
-40
4.0
5.5
V
V
4.0
V
Ambient Temperature Industrial
105
150
°C
°C
Storage Temperature Range (Extended Industrial)
TSTG
-55
1. Default Mode
• Pin Group 1: GPIO, TDI, TDO, TMS, TCK
• Pin Group 2: RESET, GPIOA7
• Pin Group 3: ADC and Comparator Analog Inputs
• Pin Group 4: XTAL, EXTAL
• Pin Group 5: DAC analog output
2. Continuous clamp current
3. All 5 volt tolerant digital I/O pins are internally clamped to VSS through a ESD protection diode. There is no diode
connection to VDD. If VIN greater than VDIO_MIN (=VSS-0.3V) is observed, then there is no need to provide current
limiting resistors at the pads. If this limit cannot be observed then a current limiting resistor is required.
4. I/O is configured as push-pull mode.
7 General
7.1 General Characteristics
The device is fabricated in high-density, low-power CMOS with 5 V–tolerant TTL-
compatible digital inputs. The term “5 V–tolerant” refers to the capability of an I/O pin,
built on a 3.3 V–compatible process technology, to withstand a voltage up to 5.5 V
without damaging the device.
5 V–tolerant I/O is desirable because many systems have a mixture of devices designed
for 3.3 V and 5 V power supplies. In such systems, a bus may carry both 3.3 V– and 5 V–
compatible I/O voltage levels (a standard 3.3 V I/O is designed to receive a maximum
voltage of 3.3 V 10ꢀ during normal operation without causing damage). This 5 V–
tolerant capability therefore offers the power savings of 3.3 V I/O levels combined with
the ability to receive 5 V levels without damage.
MC56F844xx Advance Information Data Sheet, Rev. 2, 06/2012.
24
Freescale Semiconductor, Inc.
Preliminary
General Business Information
FREESCALE [ Freescale ]
