Peripheral highlights
• Up to 16 KW FlexNVM, which can be used as additional program or data flash
memory
• Up to 1 KW FlexRAM, which can be configured as enhanced EEPROM (used in
conjunction with FlexNVM) or used as additional RAM
1.5 Interrupt Controller
• Five interrupt priority levels
• Three user programmable priority levels for each interrupt source: level 0, 1, 2
• Unmaskable level 3 interrupts include: illegal instruction, hardware stack
overflow, misaligned data access, SWI3 instruction
• Maskable level 3 interrupts include: EOnCE step counter, EOnCE breakpoint
unit, EOnCE trace buffer
• Lowest-priority software interrupt: level LP
• Support for nested interrupt: higher priority level interrupt request can interrupt
lower priority interrupt subroutine
• Masking of interrupt priority level managed by the 56800EX core
• Two programmable fast interrupts that can be assigned to any interrupt source
• Notification to System Integration Module (SIM) to restart clock when in wait and
stop states
• Ability to relocate interrupt vector table
1.6 Peripheral highlights
1.6.1 Enhanced Flex Pulse Width Modulator (eFlexPWM)
• Up to 12 output channels in each module
• 16 bits of resolution for center, edge aligned, and asymmetrical PWMs
• PWMA with accumulative fractional clock calculation
• Accumulative fractional clock calculation improves the resolution of the PWM
period and edge placement
• Arbitrary PWM edge placement
• Equivalent to 312 ps PWM frequency and duty-cycle resolution on average
• PWMB with supporting accumulative fractional clock calculation
• Accumulative fractional clock calculation improves the resolution of the PWM
period and edge placement
• Arbitrary PWM edge placement
• Equivalent to 312 ps PWM frequency and duty-cycle resolution on average
MC56F8458x Advance Information Data Sheet, Rev. 2, 06/2012.
Freescale Semiconductor, Inc.
7
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