Controller Area Network (CAN) Timing
10.14 Controller Area Network (CAN) Timing
Note: CAN is not available in the 56F8167 device.
1
Table 10-22 CAN Timing
Characteristic
Baud Rate
Bus Wake Up detection
Symbol
BRCAN
Min
Max
1
Unit
Mbps
μs
See Figure
—
5
—
T WAKEUP
10-19
—
1. Parameters listed are guaranteed by design
CAN_RX
CAN receive
data pin
T WAKEUP
(Input)
Figure 10-19 Bus Wakeup Detection
10.15 JTAG Timing
Table 10-23 JTAG Timing
Characteristic
Symbol
fOP
Min
DC
DC
50
5
Max
Unit
See Figure
10-20
TCK frequency of operation using EOnCE1
SYS_CLK/8
MHz
MHz
ns
TCK frequency of operation not using EOnCE1
TCK clock pulse width
fOP
SYS_CLK/4
10-20
tPW
—
—
—
30
30
—
10-20
TMS, TDI data set-up time
TMS, TDI data hold time
TCK low to TDO data valid
TCK low to TDO tri-state
TRST assertion time
tDS
ns
10-21
tDH
5
ns
10-21
tDV
—
ns
10-21
tTS
—
ns
10-21
2T2
tTRST
ns
10-22
1. TCK frequency of operation must be less than 1/8 the processor rate.
2. T = processor clock period (nominally 1/60MHz)
56F8367 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary
159
FREESCALE [ Freescale ]
