Introduction
the backdoor key access. The customer would need to supply Technical Support with the backdoor key
and the protocol to access the backdoor routine in the Flash. Additionally, the KEYEN bit that allows
backdoor key access must be set.
An alternative method for performing analysis on a secured hybrid controller would be to mass-erase and
reprogram the Flash with the original code, but to modify the security bytes.
To insure that a customer does not inadvertently lock himself out of the device during programming, it is
recommended that he program the backdoor access key first, his application code second, and the security
bytes within the FM configuration field last.
Part 8 General Purpose Input/Output (GPIO)
8.1 Introduction
This section is intended to supplement the GPIO information found in the 56F8300 Peripheral User
Manual and contains only chip-specific information. This information supercedes the generic information
in the 56F8300 Peripheral User Manual.
8.2 Memory Maps
The width of the GPIO port defines how many bits are implemented in each of the GPIO registers. Based
on this and the default function of each of the GPIO pins, the reset values of the GPIOx_PUR and
GPIOx_PER registers change from port to port. Tables 4-29 through 4-34 define the actual reset values of
these registers.
8.3 Configuration
There are six GPIO ports defined on the 56F8345/56F8145. The width of each port and the associated
peripheral function is shown in Table 8-1 and Table 8-2. The specific mapping of GPIO port pins is
shown in Table 8-3.
Table 8-1 56F8345 GPIO Ports Configuration
Available
Port
GPIO Port
Pins in
Peripheral Function
Reset Function
Width
56F8345
6 pins - EMI Address pins - Can only be used as GPIO
8 pins - EMI Address pins - Not available in this package
EMI Address
N/A
A
B
14
6
5
5 pins - EMI Address pins - Can only be used as GPIO
3 pins - EMI Address pins - Not available in this package
GPIO
N/A
8
56F8345 Technical Data, Rev. 17
Freescale Semiconductor
Preliminary
125
FREESCALE [ Freescale ]
