5.6.20 IRQ Pending 2 Register (IRQP2)
Base + $13
Read
15
14
13
12
11
10
9
8
7
6
1
5
1
4
1
3
1
2
1
1
1
0
1
PENDING [48:33]
Write
RESET
1
1
1
1
1
1
1
1
1
Figure 5-22 IRQ Pending 2 Register (IRQP2)
5.6.20.1 IRQ Pending (PENDING)—Bits 48–33
This register combines with the other five to represent the pending IRQs for interrupt vector numbers 2
through 81.
•
•
0 = IRQ pending for this vector number
1 = No IRQ pending for this vector number
5.6.21 IRQ Pending 3 Register (IRQP3)
Base + $14
Read
15
14
13
12
11
10
9
8
7
6
1
5
1
4
1
3
1
2
1
1
1
0
1
PENDING [64:49]
Write
1
1
1
1
1
1
1
1
1
RESET
Figure 5-23 IRQ Pending 3 Register (IRQP3)
5.6.21.1 IRQ Pending (PENDING)—Bits 64–49
This register combines with the other five to represent the pending IRQs for interrupt vector numbers 2
through 81.
•
•
0 = IRQ pending for this vector number
1 = No IRQ pending for this vector number
5.6.22 IRQ Pending 4 Register (IRQP4)
Base + $15
Read
15
1
14
1
13
12
11
10
9
8
7
6
1
5
1
4
1
3
1
2
1
1
1
0
1
PENDING [80:65]
Write
1
1
1
1
1
1
1
RESET
Figure 5-24 IRQ Pending 4 Register (IRQP4)
56F8345 Technical Data, Rev. 17
100
Freescale Semiconductor
Preliminary
FREESCALE [ Freescale ]
