Freescale’s Scalable Controller Area Network (MSCAN) Timing
10.12 Freescale’s Scalable Controller Area Network (MSCAN)
Timing
1
Table 10-17 MSCAN Timing
Characteristic
Baud rate
Bus wake-up detection
Symbol
BRCAN
Min
—
Max
1
Unit
Mbps
µs
TWAKEUP
TIPBUS
—
1. Parameters listed are guaranteed by design
MSCAN_RX
CAN receive
data pin
TWAKEUP
(Input)
Figure 10-14 Bus Wake-up Detection
2
10.13 Inter-Integrated Circuit Interface (I C) Timing
2
Table 10-18 I C Timing
Standard Mode
Minimum Maximum
Fast Mode
Minimum Maximum
Characteristic
Symbol
Unit
SCL Clock Frequency
fSCL
0
100
—
0
400
—
kHz
Hold time (repeated)
START condition. After
this period, the first clock
pulse is generated.
tHD; STA
4.0
0.6
μs
LOW period of the SCL
clock
tLOW
4.7
4.0
4.7
—
—
—
1.3
0.6
0.6
—
—
—
μs
μs
μs
μs
HIGH period of the SCL
clock
tHIGH
Set-up time for a repeated
START condition
tSU; STA
Data hold time for I2C bus
devices
01
3.452
01
0.92
tHD; DAT
2503
—
1003, 4
Data set-up time
tSU; DAT
tr
—
—
ns
ns
5
5
Rise time of both SDA and
SCL signals
1000
300
20 +0.1Cb
Fall time of both SDA and
SCL signals
tf
—
300
300
ns
20 +0.1Cb
56F8037/56F8027 Data Sheet, Rev. 6
Freescale Semiconductor
159
FREESCALE [ Freescale ]
