Document Revision History
Version History
Rev. 0
Rev. 1
Initial public release.
• In
changed the ITCN_BASE address from $00 F060 (incorrect value) to
$00 F0E0 (the correct value).
• In
added an entry for flash data retention with less than 100 program/erase
cycles (minimum 20 years).
• In
changed the device clock speed in STOP mode from 8MHz to 4MHz.
• In
changed the typical relaxation oscillator output frequency in Standby mode
from 400kHz to 200kHz.
• Changed input propagation delay values in
as follows:
Old values: 1
μs
typical, 2
μs
maximum
New values: 35 ns typical, 45 ns maximum
Rev. 2
• In
changed the maximum ADC internal clock frequency from 8MHz to
5.33MHz.
• Replaced the case outline schematics in
and
Rev. 3
Added the following note to the description of the TMS signal in
Note:
Always tie the TMS pin to V
DD
through a 2.2K resistor.
Description of Change
Please see http://www.freescale.com for the most current data sheet revision.
56F8025 Data Sheet, Rev. 3
2
Freescale Semiconductor
Preliminary
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
