Analog-to-Digital Converter (ADC) Parameters
10.14 Analog-to-Digital Converter (ADC) Parameters
1
Table 10-19 ADC Parameters
Parameter
DC Specifications
Symbol
Min
Typ
Max
Unit
Resolution
RES
fADIC
RAD
12
0.1
—
—
—
6
12
5.33
VREFH
13
Bits
MHz
V
ADC internal clock
Conversion range
VREFL
—
ADC power-up time2
tAIC cycles3
tAIC cycles3
tAIC cycles3
tAIC cycles3
tADPU
Recovery from auto standby
tREC
tADC
tADS
—
—
—
0
6
1
1
Conversion time
Sample time
Accuracy
—
—
Integral non-linearity4
(Full input signal range)
LSB5
LSB5
INL
—
—
+/- 3
+/- 5
+/- 1
Differential non-linearity
DNL
+/- .6
Monotonicity
GUARANTEED
+/- 4
Offset Voltage Internal Ref
VOFFSET
VOFFSET
EGAIN
—
—
—
+/- 9
+/- 12
mV
mV
—
Offset Voltage External Ref
Gain Error (transfer gain)
+/- 6
.998 to 1.002
1.01 to .99
ADC Inputs6 (Pin Group 3)
Input voltage (external reference)
VADIN
VADIN
IIA
VREFL
VSSA
—
—
VREFH
VDDA
+/- 2
—
V
V
Input voltage (internal reference)
Input leakage
—
0
μA
VREFH current
IVREFH
IADI
—
0
μA
Input injection current7, per pin
Input capacitance
—
—
3
mA
pF
CADI
XIN
—
See Figure 10-17
See Figure 10-17
—
Input impedance
—
—
Ohms
AC Specifications
Signal-to-noise ratio
SNR
THD
60
60
61
58
—
65
64
66
62
dB
dB
Total Harmonic Distortion
Spurious Free Dynamic Range
Signal-to-noise plus distortion
Effective Number Of Bits
SFDR
SINAD
ENOB
dB
dB
10.0
Bits
1. All measurements were made at V = 3.3V, V
= 3.3V, and V = ground
REFL
DD
REFH
2. Includes power-up of ADC and V
3. ADC clock cycles
REF
4. INL measured from V = V
to V = V
IN REFH
IN
REFL
5. LSB = Least Significant Bit = 0.806mV
6. Pin groups are detailed following Table 10-1.
7. The current that can be injected or sourced from an unselected ADC signal input without impacting the performance of the
ADC.
56F8025 Data Sheet, Rev. 3
Freescale Semiconductor
Preliminary
139
FREESCALE [ Freescale ]
