Document Revision History
Version History
Rev 0
Rev 1
Initial release
Updates to
added maximum clamp current, per pin
clarified variation over temperature table and graph
added LIN slave timing
Added alternate pins to
and
Corrected bit selects in Timer Channel 3 Input (TC3_INP) bit 9,
clarified
and simplified notes in
Added clarification on sync inputs in
added voltage difference specification to
and
deleted formula for Ambient Operating Temperature in
and a note for pin group 3, corrected
error in Port C peripheral function configuration,
updated notes in
Added RoHs and “pb-free” language to back cover.
Updates to
corrected max values for ADC Input Current High and Low; corrected typ value for
pull-up disabled Digital Input Current Low (a)
corrected typ and added max values for Standby > Stop and Powerdown modes
corrected min value for Low-Voltage Interrupt for 3.3V
corrected typ and max values and units for PLL lock time
corrected typ values for Relaxation Oscillator output frequency and variation over
temperature (also increased temp range to 150 degreesC) and added variation over
temperature from 0—105 degreesC
Updated
updated max values for Integral Non-Linearity full input signal range, Negative
Differential Non-Linearity, ADC internal clock, Offset Voltage Internal Ref, Gain Error and Offset
Voltage External Ref; updated typ values for Negative Differential Non-Linearity, Offset Voltage
Internal Ref, Gain Error and Offset Voltage External Ref; added new min values and corrected
typ values for Signal-to-noise ratio, Total Harmonic Distortion, Spurious Free Dynamic Range,
Signal-to-noise plus distortion, Effective Number of Bits
Added details to Section 1. Clarified language in State During Reset column in
corrected flash data retention temperature in
moved input current high/low
toTable
and location of footnotes in
reorganized
clarified title of
• In
added an entry for flash data retention with less than 100 program/erase
cycles (minimum 20 years).
• In
changed the device clock speed in STOP mode from 8MHz to 4MHz.
• In
changed the typical relaxation oscillator output frequency in Standby mode
from 400kHz to 200kHz.
Rev. 8
In
changed the maximum ADC internal clock frequency from 8MHz to 5.33MHz.
Description of Change
Rev 2
Rev 3
Rev 4
Rev 5
Rev 6
Rev. 7
56F8014 Technical Data, Rev. 9
2
Freescale Semiconductor
Preliminary
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
