Electrical Design Considerations
Peripheral Reference Manual
Data Sheet
Memory Address
Start End
Processor
Expert
Acronym
Legacy
New Acronym
Module
SIM
Register Name
New Acronym
Legacy Acronym
Acronym
Control Register
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
SIM_CTRL
SIM_RSTAT
SIM_SWC0-3
SIM_MSHID
SIM_LSHID
SIM_PWR
SIM_CONTROL
SIM_RSTSTS
SIM_SCR0-3
SIM_MSH_ID
SIM_LSH_ID
SIM_POWER
SIM_CLKOSR
SIM_GPS
SIM_CONTROL
SIM_RSTSTS
SIM_SCR0-3
SIM_MSH_ID
SIM_LSH_ID
0xF140
Reset Status Register
0xF141
0xF142 0xF145
0xF146
Software Control Register 0-3
Most Significant Half JTAG ID
Least Significant Half JTAG ID
Power Control Register
0xF147
0xF148
Clock Out Select Register
SIM_CLKOUT
SIM_GPS
SIM_CLKOSR
SIM_GPS
0xF14A
GPIO Peripheral Select Register
Peripheral Clock Enable Register
I/O Short Address Location High
I/O Short Address Location Low
0xF14B
SIM_PCE
SIM_PCE
SIM_PCE
0xF14C
SIM_IOSAHI
SIM_IOSALO
SIM_ISALH
SIM_ISALL
SIM_ISALH
SIM_ISALL
0xF14D
0xF14E
SPI
Status and Control Register
Data Size and Control Register
Data Receive Register
SCTRL
DSCTRL
DRCV
SPSCR
SPDSR
SPDRR
SPDTR
SPI_SCTRL
SPI_DSCTRL
SPI_DRCV
SPI_SPSCR
SPI_SPDSR
SPI_SPDRR
SPI_SPDTR
SPI_SCR
SPI_DSR
SPI_DRR
SPI_DTR
0xF0C0
0xF0C1
0xF0C2
0xF0C3
Data Transmit Register
DXMIT
SPI_DXMIT
n = 0, 1, 2, 3
TMR Compare Register 1
Compare Register 2
Capture Register
Load Register
COMP1
COMP2
CAPT
TMRCMP1
TMRCMP2
TMRCAP
TMRn_COMP1
TMRn_COMP2
TMRn_CAPT
TMRn_LOAD
TMRn_HOLD
TMRn_CNTR
TMRn_CTRL
TMRn_CMP1
TMRn_CMP2
TMRn_CAP
TMRn_CMP1
TMRn_CMP2
TMRn_CAP
0xF0n0
0xF0n1
0xF0n2
0xF0n3
0xF0n4
0xF0n5
0xF0n6
0xF0n7
0xF0n8
0xF0n9
0xF0nA
LOAD
TMRLOAD
TMRHOLD
TMRCNTR
TMRCTRL
TMRSCR
TMRn_LOAD
TMRn_HOLD
TMRn_CNTR
TMRn_CTRL
TMRn_SCR
TMRn_LOAD
TMRn_HOLD
TMRn_CNTR
TMRn_CTRL
TMRn_SCR
Hold Register
HOLD
Counter Register
Control Register
CNTR
CTRL
Status and Control Register
SCTRL
CMPLD1
CMPLD2
CSCTRL
TMRn_SCTRL
TMRn_CMPLD1
TMRn_CMPLD2
Comparator Load Register 1
Comparator Load Register 2
Comparator Status/Control Register
TMRCMPLD1
TMRCMPLD2
TMRn_CMPLD1
TMRn_CMPLD2
TMRn_COMSCR
TMRn_CMPLD1
TMRn_CMPLD2
TMRn_COMSCR
TMRCOMSCR TMRn_CSCTRL
56F8014 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary
121