Peripheral Reference Manual
Data Sheet
Memory Address
Start End
Processor
Expert
Acronym
Legacy
New Acronym
Module
FM
Register Name
New Acronym
Legacy Acronym
Acronym
Clock Divider Register
CLKDIV
CNFG
SECHI
SECLO
PROT
USTAT
CMD
FMCLKD
FMCR
FM_CLKDIV
FM_CNFG
FM_SECHI
FM_SECLO
FM_PROT
FM_USTAT
FM_CMD
FMCLKD
FMCR
FMCLKD
FMCR
0xF400
Configuration Register
Security High Half Register
Security Low Half Register
Protection Register
0xF401
0xF403
0xF404
0xF410
0xF413
0xF414
0xF416
0xF418
0xF41B
0xF41D
FMSECH
FMSECL
FMPROT
FMUSTAT
FMCMD
FMSECH
FMSECL
FMPROT
FMUSTAT
FMCMD
FMSECH
FMSECL
FMPROT
FMUSTAT
FMCMD
User Status Register
Command Register
Address Register
ADDR
DATA
FMADDR
FMDATA
FMOPT1
FMTST_SIG
FM_ADDR
FM_DATA
FM_OPT1
FM_TSTSIG
FMADDR
FMDATA
FMOPT1
FMTST_SIG
Data Buffer Register
Optional Data 1 Register
Test Array Signature Register
OPT1
FMOPT1
TSTSIG
x = A (n=0) B (n=1) C (n=2) D (n=3)
GPIO Pull-Up Enable Register
Data Register
PUPEN
DATA
PUR
DR
GPIOx_PUPEN
GPIOx_DATA
GPIOx_DDIR
GPIOx_PEREN
GPIOx_IASSRT
GPIOx_IEN
GPIOx_PUR
GPIOx_DR
GPIO_x_PUR
GPIO_x_DR
0xF1n0
0xF1n1
0xF1n2
0xF1n3
0xF1n4
0xF1n5
0xF1n6
0xF1n7
0xF1n8
0xF1n9
0xF1nA
0xF1nB
Data Direction Register
DDIR
DDR
GPIOx_DDR
GPIOx_PER
GPIOx_IAR
GPIOx_IENR
GPIOx_IPOLR
GPIOx_IPR
GPIOx_IESR
GPIO_x_DDR
GPIO_x_PER
GPIO_x_IAR
Peripheral Enable Register
Interrupt Assert Register
PEREN
IASSRT
IEN
PER
IAR
Interrupt Enable Register
Interrupt Edge Polarity Register
Interrupt Pending Register
Interrupt Edge Sensitive Register
Push-Pull Output Mode Control Register
Raw Data Register
IENR
GPIO_x_IENR
GPIO_x_IPOLR
GPIO_x_IPR
IEPOL
IPEND
IEDGE
PPOUTM
RDATA
DRIVE
IPOLR
IPR
GPIOx_IEPOL
GPIOx_IPEND
GPIOx_IEDGE
IESR
GPIO_x_IESR
GPIO_x_PPMODE
PPMODE
RAWDATA
DRIVE
GPIOx_PPOUTM GPIOx_PPMODE
GPIOx_RDATA GPIOx_RAWDATA GPIO_x_RAWDATA
Drive Strength Control Register
GPIOx_DRIVE
GPIOx_DRIVE
GPIO_x_DRIVE
PS
Control Register
Status Register
CTRL
STAT
LVICONTROL
LVISTATUS
PS_CTRL
PS_STAT
LVICONTROL
LVISTATUS
LVICTRL
LVISR
0xF160
0xF161
PWM Control Register
Fault Control Register
CTRL
FCTRL
FLTACK
OUT
PMCTL
PMFCTL
PMFSA
PMOUT
PMCNT
MCM
PWM_CTRL
PWM_FCTRL
PWM_FLTACK
PWM_OUT
PWM_PMCTL
PWM_PMFCTL
PWM_PMFSA
PWM_PMOUT
PWM_PMCNT
PWM_MCM
PWM_PMCTL
PWM_PMFCTL
PWM_PMFSA
PWM_PMOUT
PWM_PMCNT
PWM_PWMCM
0xF040
0xF041
0xF042
0xF043
0xF044
0xF045
Fault Status/Acknowledge Regis.
Output Control Register
Counter Register
CNTR
PWM_CNTR
PWM_CMOD
PWM_VAL0-5
Counter Modulo Register
Value Register 0-5
CMOD
VAL0-5
DTIM0-1
PMVAL0-5
PWM_PMVAL0-5
PWM_PWMVAL0-5 0xF046 0xF04B
Deadtime Register 0-1
PMDEADTM0-1 PWM_DTIM0-1 PWM_PMDEADTM PWM_PMDEADTM0- 0xF04C 0xF04D
0-1
1
Disable Mapping Register 1-2
DMAP1-2
PMDISMAP1-2 PWM_DMAP1-2 PWM_PMDISMAP1- PWM_PMDISMAP1-2 0xF04E 0xF04F
2
Configure Register
CNFG
CCTRL
PORT
PMCFG
PMCCR
PMPORT
PMICCR
PMSRC
PWM_CNFG
PWM_CCTRL
PWM_PORT
PWM_ICCTRL
PWM_SCTRL
PWM_PMCFG
PWM_PMCCR
PWM_PMPORT
PWM_PMICCR
PWM_PMSRC
PWM_PMCFG
PWM_PMCCR
PWM_PMPORT
PWM_PMICCR
PWM_PMSRC
0xF050
0xF051
0xF052
0xF053
0xF054
Channel Control Register
Port Register
Internal Correction Control Regis.
Source Control Register
ICCTRL
SCTRL
SCI
Baud Rate Register
Control Register 1
Control Register 2
Status Register
RATE
CTRL1
CTRL2
STAT
SCIBR
SCICR
SCICR2
SCISR
SCIDR
SCI_RATE
SCI_CTRL1
SCI_CTRL2
SCI_STAT
SCI_DATA
SCI_SCIBR
SCI_SCICR
SCI_SCICR2
SCI_SCISR
SCI_SCIDR
SCI_SCIBR
SCI_SCICR
SCI_SCICR2
SCI_SCISR
SCI_SCIDR
0xF0B0
0xF0B1
0xF0B2
0xF0B3
0xF0B4
Data Register
DATA
56F8014 Technical Data, Rev. 9
120
Freescale Semiconductor
Preliminary
FREESCALE [ Freescale ]
