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33972 参数 Datasheet PDF下载

33972图片预览
型号: 33972
PDF下载: 下载PDF文件 查看货源
内容描述: 多交换检测接口与抑制唤醒 [Multiple Switch Detection Interface with Suppressed Wake-Up]
分类和应用:
文件页数/大小: 28 页 / 1735 K
品牌: FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
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ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 4. Static Electrical Characteristics (continued)
Characteristics noted under conditions 3.1 V
V
DD
5.25 V, 8.0 V
V
PWR
16 V, -40°C
T
C
125°C, unless otherwise
noted. Where applicable, typical values reflect the parameter’s approximate average value with V
PWR
= 13 V, T
A
= 25°C.
Characteristic
DIGITAL INTERFACE
Input Logic Voltage Thresholds
SCLK, SI, Tri-State SO Input Current
0 V to V
DD
CS
Input Current
CS
= V
DD
CS
Pullup Current
CS
= 0 V
Symbol
Min
Typ
Max
Unit
V
INLOGIC
I
SCLK,
I
SI,
I
SO (TRI)
I
CS
0.8
-10
2.2
10
V
µA
µA
-10
I
CS
30
V
SO (HIGH
)
V
DD
- 0.8
V
SO (LOW
)
C
IN
V
INT (HIGH)
V
DD
- 0.5
V
INT (LOW)
I
WAKE (PU)
V
WAKE (HIGH)
4.0
V
WAKE
(
LOW
)
V
WAKE
(
MAX
)
20
15
10
µA
100
V
V
DD
V
0.4
20
100
V
DD
V
0.4
100
5.3
V
0.4
V
µA
V
pF
µA
V
SO High-State Output Voltage
I
SO (HIGH
)
= -200
µA
SO Low-State Output Voltage
I
SO (HIGH
)
= 1.6 mA
Input Capacitance on SCLK, SI, Tri-State SO
INT
Internal Pullup Current
INT
Voltage
INT
= Open Circuit
INT
Voltage
40
0.2
40
4.3
0.2
I
INT
= 1.0 mA
WAKE
Internal Pullup Current
WAKE
Voltage
WAKE
= Open Circuit
WAKE
Voltage
I
WAKE
= 1.0 mA
WAKE
Voltage
Maximum Voltage Applied to
WAKE
Through External Pullup
Notes
10. Upper and lower logic threshold voltage levels apply to SI,
CS
, and SCLK.
11. This parameter is guaranteed by design but is not production tested.
40
33972
Analog Integrated Circuit Device Data
Freescale Semiconductor
7