ELECTRICAL CHARACTERISTICS
TIMING DIAGRAMS
TIMING DIAGRAMS
CS
0.2 VDD
tL EAD
t
t
LLAAGG
0.7 VD D
0.2 VD D
SCLK
tDI(SU) tDI(HO LD)
tSISU tSIHOLD
0.7 VD D
0.2 VD D
SI
MSB in
tSOEN
tDO(EN)
tSODIS
tDO (DIS)
tVALID
0.7 VD D
0.2 VD D
SO
MSB out
LSB out
Figure 4. SPI Interface Timing
P _HS
X
DESATURATION
FAULT
P _LS
X
FROM DELAY
TIMER
Figure 5. Desaturation Blanking and Filtering Detail
B
MUX
STATE
MACHINE
P _HS
X
A
D
Q
D
Q
OUT
D
Q
P _HS_G
CLK
CLK
CLK
X
DEADTIME
CONTROL
P _HS_S
X
P _LS
X
ST PULSE
D
Q
D
D
Q
1
CLK
CLK
CLK
P _LS_G
X
Q
OUT
A
B
MUX
EN1
EN2
RST
Figure 6. Deadtime Control Delays
33937
Analog Integrated Circuit Device Data
Freescale Semiconductor
18