FUNCTIONAL DEVICE OPERATIONS
LOGIC COMMANDS AND REGISTERS
SPI REGISTER OVERVIEW
Table 6. System Status Register
BIT
Adress(A3:A0)
Register Name / Read/Write Information
SYSSR - System Status Register
7
6
5
4
$0 - $F
R
VMS
LINS
HSS
LSS
Table 7 summarizes the SPI Register content for Control Information (C3:C0)=W and status information (S3:S0) = R.
Table 7. SPI Register Overview
BIT
Adress(A3:A0)
Register Name / Read/Write Information
3
2
1
0
MCR - Mode Control Register
VSR - Voltage Status Register
VSR - Voltage Status Register
WUCR - Wake-Up Control Register
WUSR - Wake-Up Status Register
WUSR - Wake-Up Status Register
LINCR - LIN Control Register
W
R
HVSE
LINPE
VSUV
VSUV
L3WE
L3
MOD2
VDDOT
VDDOT
L2WE
L2
MOD1
BATFAIL
BATFAIL
L1WE
L1
$0
$1
$2
$3
$4
$5
$6
$7
$8
$9
VSOV
R
VSOV
W
R
L4WE
L4
R
L4
L3
L2
L1
W
R
LDVS
RXONLY
TXDOM
TXDOM
PWMHS1
HS2CL
HS2CL
PWMLS1
LS2CL
LS2CL
WD2
LSR1
LINOT
LINOT
HS2
LSR0
LINOC
LINOC
HS1
LINSR - LIN Status Register
RXSHORT
RXSHORT
PWMHS2
HS2OP
HS2OP
PWMLS2
LS2OP
LS2OP
LINSR - LIN Status Register
R
HSCR - High Side Control Register
HSSR - High Side Status Register
HSSR - High Side Status Register
LSCR - Low Side Control Register
LSSR - Low Side Status Register
LSSR - Low Side Status Register
W
R
HS1OP
HS1OP
LS2
HS1CL
HS1CL
LS1
R
W
R
LS1OP
LS1OP
WD1
LS1CL
LS1CL
WD0
R
TIMCR - Timing Control Register
W
CS/WD
$A
CYST2
WDERR
WDERR
MX2
CYST1
WDOFF
WDOFF
MX1
CYST0
WDWO
WDWO
MX0
WDSR - Watchdog Status Register
WDSR - Watchdog Status Register
AMUXCR - Analog Multiplexer Control Register
CFR - Configuration Register
R
R
WDTO
WDTO
LXDS
HVDD
HSM
$B
$C
$D
W
W
W
R
CYSX8
LSM
CSAZ
LINM
CSGS
VMM
IMR - Interrupt Mask Register
$E
$F
ISR - Interrupt Source Register
ISR3
ISR2
ISR1
ISR0
ISR - Interrupt Source Register
R
ISR3
ISR2
ISR1
ISR0
33912
Analog Integrated Circuit Device Data
Freescale Semiconductor
35
FREESCALE [ Freescale ]
